Philippe Mathieu-Daudé f4349ba966 target/mips: Fix TCG temporary leak in gen_cache_operation() ...

Fix a TCG temporary leak when translating CACHE opcode.

Fixes: 0d74a222c27 ("make ITC Configuration Tags accessible to the CPU")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210406202857.1440744-1-f4bug@amsat.org>

2021-04-13 12:07:00 +02:00

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alpha

target/alpha: fix icount handling for timer instructions

2021-04-05 07:32:56 -07:00

arm

target/arm: Check PAGE_WRITE_ORG for MTE writeability

2021-04-12 11:06:24 +01:00

avr

target/avr: Fix interrupt execution

2021-03-15 00:39:52 +01:00

cris

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hexagon

hexagon: do not specify Python scripts as inputs

2021-04-01 10:37:20 +02:00

hppa

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i386

i386: Add missing cpu feature bits in EPYC-Rome model

2021-04-09 16:02:18 -04:00

lm32

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m68k

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microblaze

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mips

target/mips: Fix TCG temporary leak in gen_cache_operation()

2021-04-13 12:07:00 +02:00

moxie

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nios2

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openrisc

target/openrisc: fix icount handling for timer instructions

2021-04-01 10:37:20 +02:00

ppc

target/ppc/kvm: Cache timebase frequency

2021-03-31 11:10:50 +11:00

riscv

target/riscv: Prevent lost illegal instruction exceptions

2021-03-22 21:54:40 -04:00

rx

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s390x

s390x: move S390_ADAPTER_SUPPRESSIBLE

2021-03-26 09:33:50 +01:00

sh4

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sparc

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tricore

target/tricore: Fix OPC2_32_RRPW_EXTR for width=0

2021-03-14 14:49:01 +01:00

unicore32

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xtensa

target/xtensa: make xtensa_modules static on import

2021-04-03 08:52:18 -07:00

meson.build

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