Paolo Bonzini 1d3db6bdbb i386: implement MSR_SMI_COUNT for TCG ...

This is trivial, so just do it.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

2018-07-30 14:00:11 +02:00

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alpha

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arm

target/arm: Correctly handle overlapping small MPU regions

2018-07-23 15:21:26 +01:00

cris

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hppa

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i386

i386: implement MSR_SMI_COUNT for TCG

2018-07-30 14:00:11 +02:00

lm32

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m68k

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microblaze

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mips

target/mips: Fix gdbstub to read/write 64 bit FP registers

2018-06-27 20:13:50 +02:00

moxie

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nios2

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openrisc

target/openrisc: Fix writes to interrupt mask register

2018-07-03 22:40:33 +09:00

ppc

target/ppc: fix build on ppc64 host

2018-07-07 12:12:27 +10:00

riscv

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s390x

s390x/cpumodel: fix segmentation fault when baselining models

2018-07-18 14:20:02 +02:00

sh4

target/sh4: Fix translator.c assertion failure for gUSA

2018-07-09 10:34:04 -07:00

sparc

SPARC64: add icount support

2018-06-17 11:13:06 +01:00

tilegx

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tricore

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unicore32

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xtensa

hw/xtensa: Use the IEC binary prefix definitions

2018-07-02 15:41:14 +02:00