qemu/disas
Michael Clark 1dc34be1c9
RISC-V: Fix missing break statement in disassembler
This fixes an issue when disassembling rv128 c.sqsp,
where the code erroneously fell through to c.swsp.

Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cc: Alistair Francis <Alistair.Francis@wdc.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Michael Clark <mjc@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2018-05-06 10:39:38 +12:00
..
libvixl
alpha.c
arm-a64.cc
arm.c disas/arm: fix 'instuction' typo in comment 2017-12-18 17:07:02 +03:00
cris.c
hppa.c
i386.c
lm32.c
m68k.c
Makefile.objs RISC-V Disassembler 2018-03-07 08:30:28 +13:00
microblaze.c
mips.c
moxie.c
nios2.c nios2: remove duplicated includes (in code commented out) 2017-12-18 17:07:02 +03:00
ppc.c
riscv.c RISC-V: Fix missing break statement in disassembler 2018-05-06 10:39:38 +12:00
s390.c disas/s390: fix global-buffer-overflow 2018-01-16 14:54:50 +01:00
sh4.c
sparc.c
tci.c
xtensa.c target/xtensa: disas/xtensa: fix coverity warnings 2018-01-22 11:54:58 -08:00