1cfe48c1ce
Rename memory_region_init_ram() to memory_region_init_ram_nomigrate(). This leaves the way clear for us to provide a memory_region_init_ram() which does handle migration. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1499438577-7674-4-git-send-email-peter.maydell@linaro.org
102 lines
3.5 KiB
C
102 lines
3.5 KiB
C
/*
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* SHIX 2.0 board description
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*
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* Copyright (c) 2005 Samuel Tardieu
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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/*
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Shix 2.0 board by Alexis Polti, described at
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https://web.archive.org/web/20070917001736/perso.enst.fr/~polti/realisations/shix20
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More information in target/sh4/README.sh4
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qemu-common.h"
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#include "cpu.h"
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#include "hw/hw.h"
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#include "hw/sh4/sh.h"
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#include "sysemu/sysemu.h"
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#include "sysemu/qtest.h"
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#include "hw/boards.h"
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#include "hw/loader.h"
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#include "exec/address-spaces.h"
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#include "qemu/error-report.h"
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#define BIOS_FILENAME "shix_bios.bin"
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#define BIOS_ADDRESS 0xA0000000
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static void shix_init(MachineState *machine)
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{
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const char *cpu_model = machine->cpu_model;
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int ret;
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SuperHCPU *cpu;
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struct SH7750State *s;
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MemoryRegion *sysmem = get_system_memory();
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MemoryRegion *rom = g_new(MemoryRegion, 1);
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MemoryRegion *sdram = g_new(MemoryRegion, 2);
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if (!cpu_model)
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cpu_model = "any";
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cpu = cpu_sh4_init(cpu_model);
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if (cpu == NULL) {
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fprintf(stderr, "Unable to find CPU definition\n");
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exit(1);
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}
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/* Allocate memory space */
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memory_region_init_ram_nomigrate(rom, NULL, "shix.rom", 0x4000, &error_fatal);
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vmstate_register_ram_global(rom);
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memory_region_set_readonly(rom, true);
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memory_region_add_subregion(sysmem, 0x00000000, rom);
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memory_region_init_ram_nomigrate(&sdram[0], NULL, "shix.sdram1", 0x01000000,
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&error_fatal);
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vmstate_register_ram_global(&sdram[0]);
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memory_region_add_subregion(sysmem, 0x08000000, &sdram[0]);
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memory_region_init_ram_nomigrate(&sdram[1], NULL, "shix.sdram2", 0x01000000,
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&error_fatal);
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vmstate_register_ram_global(&sdram[1]);
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memory_region_add_subregion(sysmem, 0x0c000000, &sdram[1]);
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/* Load BIOS in 0 (and access it through P2, 0xA0000000) */
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if (bios_name == NULL)
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bios_name = BIOS_FILENAME;
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ret = load_image_targphys(bios_name, 0, 0x4000);
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if (ret < 0 && !qtest_enabled()) {
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error_report("Could not load SHIX bios '%s'", bios_name);
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exit(1);
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}
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/* Register peripherals */
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s = sh7750_init(cpu, sysmem);
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/* XXXXX Check success */
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tc58128_init(s, "shix_linux_nand.bin", NULL);
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}
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static void shix_machine_init(MachineClass *mc)
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{
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mc->desc = "shix card";
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mc->init = shix_init;
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mc->is_default = 1;
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}
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DEFINE_MACHINE("shix", shix_machine_init)
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