932a8d1f11
Update infocenter.arm.com URLs for various pieces of Arm documentation to the new developer.arm.com equivalents. (There is a redirection in place from the old URLs, but we might as well update our comments in case the redirect ever disappears in future.) This patch covers all the URLs which are not MPS2/SSE-200/IoTKit related (those are dealt with in a different patch). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210205171456.19939-1-peter.maydell@linaro.org
54 lines
1.2 KiB
C
54 lines
1.2 KiB
C
/*
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* ARM PrimeCell PL022 Synchronous Serial Port
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*
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* Copyright (c) 2007 CodeSourcery.
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* Written by Paul Brook
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 or
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* (at your option) any later version.
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*/
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/*
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* This is a model of the Arm PrimeCell PL022 synchronous serial port.
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* The PL022 TRM is:
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* https://developer.arm.com/documentation/ddi0194/latest
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*
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* QEMU interface:
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* + sysbus IRQ: SSPINTR combined interrupt line
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* + sysbus MMIO region 0: MemoryRegion for the device's registers
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*/
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#ifndef HW_SSI_PL022_H
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#define HW_SSI_PL022_H
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#include "hw/sysbus.h"
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#include "qom/object.h"
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#define TYPE_PL022 "pl022"
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OBJECT_DECLARE_SIMPLE_TYPE(PL022State, PL022)
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struct PL022State {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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uint32_t cr0;
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uint32_t cr1;
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uint32_t bitmask;
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uint32_t sr;
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uint32_t cpsr;
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uint32_t is;
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uint32_t im;
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/* The FIFO head points to the next empty entry. */
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int tx_fifo_head;
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int rx_fifo_head;
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int tx_fifo_len;
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int rx_fifo_len;
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uint16_t tx_fifo[8];
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uint16_t rx_fifo[8];
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qemu_irq irq;
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SSIBus *ssi;
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};
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#endif
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