1bfd07bdfe
Fix breakage bya640f03178and55c0975c5b. Some TCG targets don't implement all TCG ops, so make optimizing those conditional. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
671 lines
19 KiB
C
671 lines
19 KiB
C
/*
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* Optimizations for Tiny Code Generator for QEMU
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*
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* Copyright (c) 2010 Samsung Electronics.
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* Contributed by Kirill Batuzov <batuzovk@ispras.ru>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "config.h"
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#include <stdlib.h>
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#include <stdio.h>
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#include "qemu-common.h"
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#include "tcg-op.h"
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#if TCG_TARGET_REG_BITS == 64
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#define CASE_OP_32_64(x) \
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glue(glue(case INDEX_op_, x), _i32): \
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glue(glue(case INDEX_op_, x), _i64)
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#else
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#define CASE_OP_32_64(x) \
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glue(glue(case INDEX_op_, x), _i32)
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#endif
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typedef enum {
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TCG_TEMP_UNDEF = 0,
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TCG_TEMP_CONST,
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TCG_TEMP_COPY,
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TCG_TEMP_HAS_COPY,
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TCG_TEMP_ANY
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} tcg_temp_state;
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struct tcg_temp_info {
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tcg_temp_state state;
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uint16_t prev_copy;
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uint16_t next_copy;
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tcg_target_ulong val;
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};
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static struct tcg_temp_info temps[TCG_MAX_TEMPS];
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/* Reset TEMP's state to TCG_TEMP_ANY. If TEMP was a representative of some
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class of equivalent temp's, a new representative should be chosen in this
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class. */
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static void reset_temp(TCGArg temp, int nb_temps, int nb_globals)
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{
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int i;
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TCGArg new_base = (TCGArg)-1;
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if (temps[temp].state == TCG_TEMP_HAS_COPY) {
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for (i = temps[temp].next_copy; i != temp; i = temps[i].next_copy) {
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if (i >= nb_globals) {
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temps[i].state = TCG_TEMP_HAS_COPY;
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new_base = i;
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break;
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}
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}
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for (i = temps[temp].next_copy; i != temp; i = temps[i].next_copy) {
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if (new_base == (TCGArg)-1) {
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temps[i].state = TCG_TEMP_ANY;
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} else {
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temps[i].val = new_base;
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}
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}
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temps[temps[temp].next_copy].prev_copy = temps[temp].prev_copy;
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temps[temps[temp].prev_copy].next_copy = temps[temp].next_copy;
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} else if (temps[temp].state == TCG_TEMP_COPY) {
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temps[temps[temp].next_copy].prev_copy = temps[temp].prev_copy;
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temps[temps[temp].prev_copy].next_copy = temps[temp].next_copy;
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new_base = temps[temp].val;
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}
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temps[temp].state = TCG_TEMP_ANY;
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if (new_base != (TCGArg)-1 && temps[new_base].next_copy == new_base) {
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temps[new_base].state = TCG_TEMP_ANY;
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}
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}
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static int op_bits(int op)
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{
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switch (op) {
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case INDEX_op_mov_i32:
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case INDEX_op_add_i32:
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case INDEX_op_sub_i32:
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case INDEX_op_mul_i32:
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case INDEX_op_and_i32:
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case INDEX_op_or_i32:
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case INDEX_op_xor_i32:
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case INDEX_op_shl_i32:
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case INDEX_op_shr_i32:
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case INDEX_op_sar_i32:
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#ifdef TCG_TARGET_HAS_rot_i32
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case INDEX_op_rotl_i32:
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case INDEX_op_rotr_i32:
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#endif
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#ifdef TCG_TARGET_HAS_not_i32
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case INDEX_op_not_i32:
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#endif
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#ifdef TCG_TARGET_HAS_ext8s_i32
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case INDEX_op_ext8s_i32:
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#endif
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#ifdef TCG_TARGET_HAS_ext16s_i32
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case INDEX_op_ext16s_i32:
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#endif
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#ifdef TCG_TARGET_HAS_ext8u_i32
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case INDEX_op_ext8u_i32:
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#endif
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#ifdef TCG_TARGET_HAS_ext16u_i32
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case INDEX_op_ext16u_i32:
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#endif
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return 32;
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#if TCG_TARGET_REG_BITS == 64
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case INDEX_op_mov_i64:
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case INDEX_op_add_i64:
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case INDEX_op_sub_i64:
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case INDEX_op_mul_i64:
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case INDEX_op_and_i64:
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case INDEX_op_or_i64:
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case INDEX_op_xor_i64:
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case INDEX_op_shl_i64:
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case INDEX_op_shr_i64:
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case INDEX_op_sar_i64:
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#ifdef TCG_TARGET_HAS_rot_i64
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case INDEX_op_rotl_i64:
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case INDEX_op_rotr_i64:
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#endif
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#ifdef TCG_TARGET_HAS_not_i64
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case INDEX_op_not_i64:
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#endif
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#ifdef TCG_TARGET_HAS_ext8s_i64
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case INDEX_op_ext8s_i64:
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#endif
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#ifdef TCG_TARGET_HAS_ext16s_i64
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case INDEX_op_ext16s_i64:
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#endif
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#ifdef TCG_TARGET_HAS_ext32s_i64
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case INDEX_op_ext32s_i64:
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#endif
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#ifdef TCG_TARGET_HAS_ext8u_i64
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case INDEX_op_ext8u_i64:
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#endif
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#ifdef TCG_TARGET_HAS_ext16u_i64
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case INDEX_op_ext16u_i64:
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#endif
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#ifdef TCG_TARGET_HAS_ext32u_i64
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case INDEX_op_ext32u_i64:
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#endif
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return 64;
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#endif
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default:
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fprintf(stderr, "Unrecognized operation %d in op_bits.\n", op);
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tcg_abort();
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}
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}
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static int op_to_movi(int op)
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{
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switch (op_bits(op)) {
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case 32:
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return INDEX_op_movi_i32;
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#if TCG_TARGET_REG_BITS == 64
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case 64:
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return INDEX_op_movi_i64;
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#endif
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default:
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fprintf(stderr, "op_to_movi: unexpected return value of "
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"function op_bits.\n");
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tcg_abort();
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}
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}
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static void tcg_opt_gen_mov(TCGArg *gen_args, TCGArg dst, TCGArg src,
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int nb_temps, int nb_globals)
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{
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reset_temp(dst, nb_temps, nb_globals);
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assert(temps[src].state != TCG_TEMP_COPY);
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if (src >= nb_globals) {
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assert(temps[src].state != TCG_TEMP_CONST);
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if (temps[src].state != TCG_TEMP_HAS_COPY) {
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temps[src].state = TCG_TEMP_HAS_COPY;
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temps[src].next_copy = src;
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temps[src].prev_copy = src;
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}
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temps[dst].state = TCG_TEMP_COPY;
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temps[dst].val = src;
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temps[dst].next_copy = temps[src].next_copy;
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temps[dst].prev_copy = src;
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temps[temps[dst].next_copy].prev_copy = dst;
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temps[src].next_copy = dst;
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}
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gen_args[0] = dst;
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gen_args[1] = src;
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}
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static void tcg_opt_gen_movi(TCGArg *gen_args, TCGArg dst, TCGArg val,
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int nb_temps, int nb_globals)
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{
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reset_temp(dst, nb_temps, nb_globals);
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temps[dst].state = TCG_TEMP_CONST;
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temps[dst].val = val;
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gen_args[0] = dst;
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gen_args[1] = val;
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}
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static int op_to_mov(int op)
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{
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switch (op_bits(op)) {
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case 32:
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return INDEX_op_mov_i32;
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#if TCG_TARGET_REG_BITS == 64
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case 64:
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return INDEX_op_mov_i64;
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#endif
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default:
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fprintf(stderr, "op_to_mov: unexpected return value of "
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"function op_bits.\n");
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tcg_abort();
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}
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}
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static TCGArg do_constant_folding_2(int op, TCGArg x, TCGArg y)
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{
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switch (op) {
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CASE_OP_32_64(add):
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return x + y;
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CASE_OP_32_64(sub):
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return x - y;
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CASE_OP_32_64(mul):
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return x * y;
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CASE_OP_32_64(and):
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return x & y;
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CASE_OP_32_64(or):
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return x | y;
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CASE_OP_32_64(xor):
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return x ^ y;
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case INDEX_op_shl_i32:
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return (uint32_t)x << (uint32_t)y;
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#if TCG_TARGET_REG_BITS == 64
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case INDEX_op_shl_i64:
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return (uint64_t)x << (uint64_t)y;
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#endif
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case INDEX_op_shr_i32:
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return (uint32_t)x >> (uint32_t)y;
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#if TCG_TARGET_REG_BITS == 64
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case INDEX_op_shr_i64:
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return (uint64_t)x >> (uint64_t)y;
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#endif
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case INDEX_op_sar_i32:
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return (int32_t)x >> (int32_t)y;
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#if TCG_TARGET_REG_BITS == 64
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case INDEX_op_sar_i64:
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return (int64_t)x >> (int64_t)y;
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#endif
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#ifdef TCG_TARGET_HAS_rot_i32
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case INDEX_op_rotr_i32:
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#if TCG_TARGET_REG_BITS == 64
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x &= 0xffffffff;
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y &= 0xffffffff;
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#endif
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x = (x << (32 - y)) | (x >> y);
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return x;
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#endif
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#ifdef TCG_TARGET_HAS_rot_i64
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#if TCG_TARGET_REG_BITS == 64
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case INDEX_op_rotr_i64:
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x = (x << (64 - y)) | (x >> y);
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return x;
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#endif
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#endif
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#ifdef TCG_TARGET_HAS_rot_i32
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case INDEX_op_rotl_i32:
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#if TCG_TARGET_REG_BITS == 64
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x &= 0xffffffff;
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y &= 0xffffffff;
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#endif
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x = (x << y) | (x >> (32 - y));
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return x;
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#endif
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#ifdef TCG_TARGET_HAS_rot_i64
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#if TCG_TARGET_REG_BITS == 64
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case INDEX_op_rotl_i64:
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x = (x << y) | (x >> (64 - y));
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return x;
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#endif
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#endif
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#if defined(TCG_TARGET_HAS_not_i32) || defined(TCG_TARGET_HAS_not_i64)
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#ifdef TCG_TARGET_HAS_not_i32
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case INDEX_op_not_i32:
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#else
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case INDEX_op_not_i64:
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#endif
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return ~x;
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#endif
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#if defined(TCG_TARGET_HAS_ext8s_i32) || defined(TCG_TARGET_HAS_ext8s_i64)
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#ifdef TCG_TARGET_HAS_ext8s_i32
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case INDEX_op_ext8s_i32:
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#else
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case INDEX_op_ext8s_i64:
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#endif
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return (int8_t)x;
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#endif
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#if defined(TCG_TARGET_HAS_ext16s_i32) || defined(TCG_TARGET_HAS_ext16s_i64)
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#ifdef TCG_TARGET_HAS_ext16s_i32
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case INDEX_op_ext16s_i32:
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#else
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case INDEX_op_ext16s_i64:
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#endif
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return (int16_t)x;
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#endif
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#if defined(TCG_TARGET_HAS_ext8u_i32) || defined(TCG_TARGET_HAS_ext8u_i64)
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#ifdef TCG_TARGET_HAS_ext8u_i32
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case INDEX_op_ext8u_i32:
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#else
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case INDEX_op_ext8u_i64:
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#endif
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return (uint8_t)x;
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#endif
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#if defined(TCG_TARGET_HAS_ext16u_i32) || defined(TCG_TARGET_HAS_ext16u_i64)
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#ifdef TCG_TARGET_HAS_ext16u_i32
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case INDEX_op_ext16u_i32:
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#else
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case INDEX_op_ext16u_i64:
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#endif
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return (uint16_t)x;
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#endif
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#if TCG_TARGET_REG_BITS == 64
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#ifdef TCG_TARGET_HAS_ext32s_i32
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case INDEX_op_ext32s_i64:
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return (int32_t)x;
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#endif
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#ifdef TCG_TARGET_HAS_ext32u_i32
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case INDEX_op_ext32u_i64:
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return (uint32_t)x;
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#endif
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#endif
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default:
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fprintf(stderr,
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"Unrecognized operation %d in do_constant_folding.\n", op);
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tcg_abort();
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}
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}
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static TCGArg do_constant_folding(int op, TCGArg x, TCGArg y)
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{
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TCGArg res = do_constant_folding_2(op, x, y);
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#if TCG_TARGET_REG_BITS == 64
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if (op_bits(op) == 32) {
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res &= 0xffffffff;
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}
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#endif
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return res;
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}
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/* Propagate constants and copies, fold constant expressions. */
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static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr,
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TCGArg *args, TCGOpDef *tcg_op_defs)
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{
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int i, nb_ops, op_index, op, nb_temps, nb_globals, nb_call_args;
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const TCGOpDef *def;
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TCGArg *gen_args;
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TCGArg tmp;
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/* Array VALS has an element for each temp.
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If this temp holds a constant then its value is kept in VALS' element.
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If this temp is a copy of other ones then this equivalence class'
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representative is kept in VALS' element.
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If this temp is neither copy nor constant then corresponding VALS'
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element is unused. */
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nb_temps = s->nb_temps;
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nb_globals = s->nb_globals;
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memset(temps, 0, nb_temps * sizeof(struct tcg_temp_info));
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nb_ops = tcg_opc_ptr - gen_opc_buf;
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gen_args = args;
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for (op_index = 0; op_index < nb_ops; op_index++) {
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op = gen_opc_buf[op_index];
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def = &tcg_op_defs[op];
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/* Do copy propagation */
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if (!(def->flags & (TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS))) {
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assert(op != INDEX_op_call);
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for (i = def->nb_oargs; i < def->nb_oargs + def->nb_iargs; i++) {
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if (temps[args[i]].state == TCG_TEMP_COPY) {
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args[i] = temps[args[i]].val;
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}
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}
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}
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/* For commutative operations make constant second argument */
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switch (op) {
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CASE_OP_32_64(add):
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CASE_OP_32_64(mul):
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CASE_OP_32_64(and):
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CASE_OP_32_64(or):
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CASE_OP_32_64(xor):
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if (temps[args[1]].state == TCG_TEMP_CONST) {
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tmp = args[1];
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args[1] = args[2];
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args[2] = tmp;
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}
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break;
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default:
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break;
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}
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/* Simplify expression if possible. */
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switch (op) {
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CASE_OP_32_64(add):
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CASE_OP_32_64(sub):
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CASE_OP_32_64(shl):
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CASE_OP_32_64(shr):
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CASE_OP_32_64(sar):
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#ifdef TCG_TARGET_HAS_rot_i32
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case INDEX_op_rotl_i32:
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case INDEX_op_rotr_i32:
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#endif
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#ifdef TCG_TARGET_HAS_rot_i64
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case INDEX_op_rotl_i64:
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case INDEX_op_rotr_i64:
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#endif
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if (temps[args[1]].state == TCG_TEMP_CONST) {
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/* Proceed with possible constant folding. */
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break;
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}
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if (temps[args[2]].state == TCG_TEMP_CONST
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&& temps[args[2]].val == 0) {
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if ((temps[args[0]].state == TCG_TEMP_COPY
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&& temps[args[0]].val == args[1])
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|| args[0] == args[1]) {
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args += 3;
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gen_opc_buf[op_index] = INDEX_op_nop;
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} else {
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gen_opc_buf[op_index] = op_to_mov(op);
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tcg_opt_gen_mov(gen_args, args[0], args[1],
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nb_temps, nb_globals);
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gen_args += 2;
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args += 3;
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}
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continue;
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}
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|
break;
|
|
CASE_OP_32_64(mul):
|
|
if ((temps[args[2]].state == TCG_TEMP_CONST
|
|
&& temps[args[2]].val == 0)) {
|
|
gen_opc_buf[op_index] = op_to_movi(op);
|
|
tcg_opt_gen_movi(gen_args, args[0], 0, nb_temps, nb_globals);
|
|
args += 3;
|
|
gen_args += 2;
|
|
continue;
|
|
}
|
|
break;
|
|
CASE_OP_32_64(or):
|
|
CASE_OP_32_64(and):
|
|
if (args[1] == args[2]) {
|
|
if (args[1] == args[0]) {
|
|
args += 3;
|
|
gen_opc_buf[op_index] = INDEX_op_nop;
|
|
} else {
|
|
gen_opc_buf[op_index] = op_to_mov(op);
|
|
tcg_opt_gen_mov(gen_args, args[0], args[1], nb_temps,
|
|
nb_globals);
|
|
gen_args += 2;
|
|
args += 3;
|
|
}
|
|
continue;
|
|
}
|
|
break;
|
|
}
|
|
|
|
/* Propagate constants through copy operations and do constant
|
|
folding. Constants will be substituted to arguments by register
|
|
allocator where needed and possible. Also detect copies. */
|
|
switch (op) {
|
|
CASE_OP_32_64(mov):
|
|
if ((temps[args[1]].state == TCG_TEMP_COPY
|
|
&& temps[args[1]].val == args[0])
|
|
|| args[0] == args[1]) {
|
|
args += 2;
|
|
gen_opc_buf[op_index] = INDEX_op_nop;
|
|
break;
|
|
}
|
|
if (temps[args[1]].state != TCG_TEMP_CONST) {
|
|
tcg_opt_gen_mov(gen_args, args[0], args[1],
|
|
nb_temps, nb_globals);
|
|
gen_args += 2;
|
|
args += 2;
|
|
break;
|
|
}
|
|
/* Source argument is constant. Rewrite the operation and
|
|
let movi case handle it. */
|
|
op = op_to_movi(op);
|
|
gen_opc_buf[op_index] = op;
|
|
args[1] = temps[args[1]].val;
|
|
/* fallthrough */
|
|
CASE_OP_32_64(movi):
|
|
tcg_opt_gen_movi(gen_args, args[0], args[1], nb_temps, nb_globals);
|
|
gen_args += 2;
|
|
args += 2;
|
|
break;
|
|
CASE_OP_32_64(not):
|
|
#ifdef TCG_TARGET_HAS_ext8s_i32
|
|
case INDEX_op_ext8s_i32:
|
|
#endif
|
|
#ifdef TCG_TARGET_HAS_ext8s_i64
|
|
case INDEX_op_ext8s_i64:
|
|
#endif
|
|
#ifdef TCG_TARGET_HAS_ext16s_i32
|
|
case INDEX_op_ext16s_i32:
|
|
#endif
|
|
#ifdef TCG_TARGET_HAS_ext16s_i64
|
|
case INDEX_op_ext16s_i64:
|
|
#endif
|
|
#ifdef TCG_TARGET_HAS_ext8u_i32
|
|
case INDEX_op_ext8u_i32:
|
|
#endif
|
|
#ifdef TCG_TARGET_HAS_ext8u_i64
|
|
case INDEX_op_ext8u_i64:
|
|
#endif
|
|
#ifdef TCG_TARGET_HAS_ext16u_i32
|
|
case INDEX_op_ext16u_i32:
|
|
#endif
|
|
#ifdef TCG_TARGET_HAS_ext16u_i64
|
|
case INDEX_op_ext16u_i64:
|
|
#endif
|
|
#if TCG_TARGET_REG_BITS == 64
|
|
case INDEX_op_ext32s_i64:
|
|
case INDEX_op_ext32u_i64:
|
|
#endif
|
|
if (temps[args[1]].state == TCG_TEMP_CONST) {
|
|
gen_opc_buf[op_index] = op_to_movi(op);
|
|
tmp = do_constant_folding(op, temps[args[1]].val, 0);
|
|
tcg_opt_gen_movi(gen_args, args[0], tmp, nb_temps, nb_globals);
|
|
gen_args += 2;
|
|
args += 2;
|
|
break;
|
|
} else {
|
|
reset_temp(args[0], nb_temps, nb_globals);
|
|
gen_args[0] = args[0];
|
|
gen_args[1] = args[1];
|
|
gen_args += 2;
|
|
args += 2;
|
|
break;
|
|
}
|
|
CASE_OP_32_64(add):
|
|
CASE_OP_32_64(sub):
|
|
CASE_OP_32_64(mul):
|
|
CASE_OP_32_64(or):
|
|
CASE_OP_32_64(and):
|
|
CASE_OP_32_64(xor):
|
|
CASE_OP_32_64(shl):
|
|
CASE_OP_32_64(shr):
|
|
CASE_OP_32_64(sar):
|
|
#ifdef TCG_TARGET_HAS_rot_i32
|
|
case INDEX_op_rotl_i32:
|
|
case INDEX_op_rotr_i32:
|
|
#endif
|
|
#ifdef TCG_TARGET_HAS_rot_i64
|
|
case INDEX_op_rotl_i64:
|
|
case INDEX_op_rotr_i64:
|
|
#endif
|
|
if (temps[args[1]].state == TCG_TEMP_CONST
|
|
&& temps[args[2]].state == TCG_TEMP_CONST) {
|
|
gen_opc_buf[op_index] = op_to_movi(op);
|
|
tmp = do_constant_folding(op, temps[args[1]].val,
|
|
temps[args[2]].val);
|
|
tcg_opt_gen_movi(gen_args, args[0], tmp, nb_temps, nb_globals);
|
|
gen_args += 2;
|
|
args += 3;
|
|
break;
|
|
} else {
|
|
reset_temp(args[0], nb_temps, nb_globals);
|
|
gen_args[0] = args[0];
|
|
gen_args[1] = args[1];
|
|
gen_args[2] = args[2];
|
|
gen_args += 3;
|
|
args += 3;
|
|
break;
|
|
}
|
|
case INDEX_op_call:
|
|
nb_call_args = (args[0] >> 16) + (args[0] & 0xffff);
|
|
if (!(args[nb_call_args + 1] & (TCG_CALL_CONST | TCG_CALL_PURE))) {
|
|
for (i = 0; i < nb_globals; i++) {
|
|
reset_temp(i, nb_temps, nb_globals);
|
|
}
|
|
}
|
|
for (i = 0; i < (args[0] >> 16); i++) {
|
|
reset_temp(args[i + 1], nb_temps, nb_globals);
|
|
}
|
|
i = nb_call_args + 3;
|
|
while (i) {
|
|
*gen_args = *args;
|
|
args++;
|
|
gen_args++;
|
|
i--;
|
|
}
|
|
break;
|
|
case INDEX_op_set_label:
|
|
case INDEX_op_jmp:
|
|
case INDEX_op_br:
|
|
CASE_OP_32_64(brcond):
|
|
memset(temps, 0, nb_temps * sizeof(struct tcg_temp_info));
|
|
for (i = 0; i < def->nb_args; i++) {
|
|
*gen_args = *args;
|
|
args++;
|
|
gen_args++;
|
|
}
|
|
break;
|
|
default:
|
|
/* Default case: we do know nothing about operation so no
|
|
propagation is done. We only trash output args. */
|
|
for (i = 0; i < def->nb_oargs; i++) {
|
|
reset_temp(args[i], nb_temps, nb_globals);
|
|
}
|
|
for (i = 0; i < def->nb_args; i++) {
|
|
gen_args[i] = args[i];
|
|
}
|
|
args += def->nb_args;
|
|
gen_args += def->nb_args;
|
|
break;
|
|
}
|
|
}
|
|
|
|
return gen_args;
|
|
}
|
|
|
|
TCGArg *tcg_optimize(TCGContext *s, uint16_t *tcg_opc_ptr,
|
|
TCGArg *args, TCGOpDef *tcg_op_defs)
|
|
{
|
|
TCGArg *res;
|
|
res = tcg_constant_folding(s, tcg_opc_ptr, args, tcg_op_defs);
|
|
return res;
|
|
}
|