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1ad9f0a464
qemu/target/ppc/translate
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Bharata B Rao e0aee726bf target-ppc: Add xscvqpudz and xscvqpuwz instructions 
xscvqpudz: VSX Scalar truncate & Convert Quad-Precision format to
           Unsigned Doubleword format
xscvqpuwz: VSX Scalar truncate & Convert Quad-Precision format to
           Unsigned Word format

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-02-22 11:28:28 +11:00
..
dfp-impl.inc.c
dfp-ops.inc.c
fp-impl.inc.c target-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64 2017-01-31 10:10:14 +11:00
fp-ops.inc.c target-ppc: implement stxsd and stxssp 2017-01-31 10:10:12 +11:00
spe-impl.inc.c
spe-ops.inc.c
vmx-impl.inc.c ppc: Implement bcdutrunc. instruction 2017-01-31 10:10:14 +11:00
vmx-ops.inc.c ppc: Implement bcdutrunc. instruction 2017-01-31 10:10:14 +11:00
vsx-impl.inc.c target-ppc: Add xscvqpudz and xscvqpuwz instructions 2017-02-22 11:28:28 +11:00
vsx-ops.inc.c target-ppc: Add xscvqpudz and xscvqpuwz instructions 2017-02-22 11:28:28 +11:00