19d7c0d460
Signed-off-by: Peter Delevoryas <peter@pjd.dev>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
[ clg: - fixed URL links
- Moved Facebook Yosemite section at the end of the file ]
Message-Id: <20220705191400.41632-10-peter@pjd.dev>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
233 lines
7.5 KiB
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233 lines
7.5 KiB
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Aspeed family boards (``*-bmc``, ``ast2500-evb``, ``ast2600-evb``)
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==================================================================
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The QEMU Aspeed machines model BMCs of various OpenPOWER systems and
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Aspeed evaluation boards. They are based on different releases of the
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Aspeed SoC : the AST2400 integrating an ARM926EJ-S CPU (400MHz), the
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AST2500 with an ARM1176JZS CPU (800MHz) and more recently the AST2600
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with dual cores ARM Cortex-A7 CPUs (1.2GHz).
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The SoC comes with RAM, Gigabit ethernet, USB, SD/MMC, USB, SPI, I2C,
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etc.
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AST2400 SoC based machines :
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- ``palmetto-bmc`` OpenPOWER Palmetto POWER8 BMC
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- ``quanta-q71l-bmc`` OpenBMC Quanta BMC
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- ``supermicrox11-bmc`` Supermicro X11 BMC
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AST2500 SoC based machines :
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- ``ast2500-evb`` Aspeed AST2500 Evaluation board
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- ``romulus-bmc`` OpenPOWER Romulus POWER9 BMC
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- ``witherspoon-bmc`` OpenPOWER Witherspoon POWER9 BMC
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- ``sonorapass-bmc`` OCP SonoraPass BMC
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- ``fp5280g2-bmc`` Inspur FP5280G2 BMC
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- ``g220a-bmc`` Bytedance G220A BMC
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AST2600 SoC based machines :
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- ``ast2600-evb`` Aspeed AST2600 Evaluation board (Cortex-A7)
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- ``tacoma-bmc`` OpenPOWER Witherspoon POWER9 AST2600 BMC
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- ``rainier-bmc`` IBM Rainier POWER10 BMC
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- ``fuji-bmc`` Facebook Fuji BMC
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- ``fby35-bmc`` Facebook fby35 BMC
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Supported devices
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-----------------
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* SMP (for the AST2600 Cortex-A7)
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* Interrupt Controller (VIC)
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* Timer Controller
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* RTC Controller
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* I2C Controller
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* System Control Unit (SCU)
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* SRAM mapping
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* X-DMA Controller (basic interface)
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* Static Memory Controller (SMC or FMC) - Only SPI Flash support
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* SPI Memory Controller
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* USB 2.0 Controller
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* SD/MMC storage controllers
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* SDRAM controller (dummy interface for basic settings and training)
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* Watchdog Controller
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* GPIO Controller (Master only)
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* UART
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* Ethernet controllers
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* Front LEDs (PCA9552 on I2C bus)
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* LPC Peripheral Controller (a subset of subdevices are supported)
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* Hash/Crypto Engine (HACE) - Hash support only. TODO: HMAC and RSA
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* ADC
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Missing devices
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---------------
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* Coprocessor support
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* PWM and Fan Controller
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* Slave GPIO Controller
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* Super I/O Controller
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* PCI-Express 1 Controller
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* Graphic Display Controller
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* PECI Controller
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* MCTP Controller
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* Mailbox Controller
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* Virtual UART
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* eSPI Controller
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* I3C Controller
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Boot options
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------------
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The Aspeed machines can be started using the ``-kernel`` and ``-dtb`` options
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to load a Linux kernel or from a firmware. Images can be downloaded from the
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OpenBMC jenkins :
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https://jenkins.openbmc.org/job/ci-openbmc/lastSuccessfulBuild/
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or directly from the OpenBMC GitHub release repository :
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https://github.com/openbmc/openbmc/releases
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To boot a kernel directly from a Linux build tree:
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.. code-block:: bash
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$ qemu-system-arm -M ast2600-evb -nographic \
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-kernel arch/arm/boot/zImage \
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-dtb arch/arm/boot/dts/aspeed-ast2600-evb.dtb \
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-initrd rootfs.cpio
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The image should be attached as an MTD drive. Run :
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.. code-block:: bash
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$ qemu-system-arm -M romulus-bmc -nic user \
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-drive file=obmc-phosphor-image-romulus.static.mtd,format=raw,if=mtd -nographic
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Options specific to Aspeed machines are :
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* ``execute-in-place`` which emulates the boot from the CE0 flash
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device by using the FMC controller to load the instructions, and
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not simply from RAM. This takes a little longer.
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* ``fmc-model`` to change the FMC Flash model. FW needs support for
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the chip model to boot.
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* ``spi-model`` to change the SPI Flash model.
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For instance, to start the ``ast2500-evb`` machine with a different
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FMC chip and a bigger (64M) SPI chip, use :
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.. code-block:: bash
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-M ast2500-evb,fmc-model=mx25l25635e,spi-model=mx66u51235f
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Aspeed minibmc family boards (``ast1030-evb``)
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==================================================================
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The QEMU Aspeed machines model mini BMCs of various Aspeed evaluation
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boards. They are based on different releases of the
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Aspeed SoC : the AST1030 integrating an ARM Cortex M4F CPU (200MHz).
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The SoC comes with SRAM, SPI, I2C, etc.
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AST1030 SoC based machines :
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- ``ast1030-evb`` Aspeed AST1030 Evaluation board (Cortex-M4F)
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Supported devices
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-----------------
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* SMP (for the AST1030 Cortex-M4F)
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* Interrupt Controller (VIC)
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* Timer Controller
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* I2C Controller
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* System Control Unit (SCU)
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* SRAM mapping
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* Static Memory Controller (SMC or FMC) - Only SPI Flash support
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* SPI Memory Controller
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* USB 2.0 Controller
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* Watchdog Controller
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* GPIO Controller (Master only)
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* UART
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* LPC Peripheral Controller (a subset of subdevices are supported)
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* Hash/Crypto Engine (HACE) - Hash support only. TODO: HMAC and RSA
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* ADC
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Missing devices
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---------------
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* PWM and Fan Controller
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* Slave GPIO Controller
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* PECI Controller
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* Mailbox Controller
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* Virtual UART
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* eSPI Controller
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* I3C Controller
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Boot options
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------------
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The Aspeed machines can be started using the ``-kernel`` to load a
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Zephyr OS or from a firmware. Images can be downloaded from the
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ASPEED GitHub release repository :
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https://github.com/AspeedTech-BMC/zephyr/releases
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To boot a kernel directly from a Zephyr build tree:
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.. code-block:: bash
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$ qemu-system-arm -M ast1030-evb -nographic \
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-kernel zephyr.elf
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Facebook Yosemite v3.5 Platform and CraterLake Server (``fby35``)
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==================================================================
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Facebook has a series of multi-node compute server designs named
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Yosemite. The most recent version released was
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`Yosemite v3 <https://www.opencompute.org/documents/ocp-yosemite-v3-platform-design-specification-1v16-pdf>`__.
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Yosemite v3.5 is an iteration on this design, and is very similar: there's a
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baseboard with a BMC, and 4 server slots. The new server board design termed
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"CraterLake" includes a Bridge IC (BIC), with room for expansion boards to
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include various compute accelerators (video, inferencing, etc). At the moment,
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only the first server slot's BIC is included.
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Yosemite v3.5 is itself a sled which fits into a 40U chassis, and 3 sleds
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can be fit into a chassis. See `here <https://www.opencompute.org/products/423/wiwynn-yosemite-v3-server>`__
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for an example.
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In this generation, the BMC is an AST2600 and each BIC is an AST1030. The BMC
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runs `OpenBMC <https://github.com/facebook/openbmc>`__, and the BIC runs
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`OpenBIC <https://github.com/facebook/openbic>`__.
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Firmware images can be retrieved from the Github releases or built from the
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source code, see the README's for instructions on that. This image uses the
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"fby35" machine recipe from OpenBMC, and the "yv35-cl" target from OpenBIC.
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Some reference images can also be found here:
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.. code-block:: bash
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$ wget https://github.com/facebook/openbmc/releases/download/openbmc-e2294ff5d31d/fby35.mtd
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$ wget https://github.com/peterdelevoryas/OpenBIC/releases/download/oby35-cl-2022.13.01/Y35BCL.elf
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Since this machine has multiple SoC's, each with their own serial console, the
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recommended way to run it is to allocate a pseudoterminal for each serial
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console and let the monitor use stdio. Also, starting in a paused state is
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useful because it allows you to attach to the pseudoterminals before the boot
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process starts.
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.. code-block:: bash
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$ qemu-system-arm -machine fby35 \
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-drive file=fby35.mtd,format=raw,if=mtd \
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-device loader,file=Y35BCL.elf,addr=0,cpu-num=2 \
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-serial pty -serial pty -serial mon:stdio \
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-display none -S
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$ screen /dev/tty0 # In a separate TMUX pane, terminal window, etc.
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$ screen /dev/tty1
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$ (qemu) c # Start the boot process once screen is setup.
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