qemu/target/arm
Peter Maydell dc7a88d081 target/arm: Implement ARMv8.1-VMID16 extension
The ARMv8.1-VMID16 extension extends the VMID from 8 bits to 16 bits:

 * the ID_AA64MMFR1_EL1.VMIDBits field specifies whether the VMID is
   8 or 16 bits
 * the VMID field in VTTBR_EL2 is extended to 16 bits
 * VTCR_EL2.VS lets the guest specify whether to use the full 16 bits,
   or use the backwards-compatible 8 bits

For QEMU implementing this is trivial:
 * we do not track VMIDs in TLB entries, so we never use the VMID field
 * we treat any write to VTTBR_EL2, not just a change to the VMID field
   bits, as a "possible VMID change" that causes us to throw away TLB
   entries, so that code doesn't need changing
 * we allow the guest to read/write the VTCR_EL2.VS bit already

So all that's missing is the ID register part: report that we support
VMID16 in our 'max' CPU.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200210120146.17631-1-peter.maydell@linaro.org
2020-02-13 14:30:51 +00:00
..
a32-uncond.decode
a32.decode
arch_dump.c target/arm/arch_dump: Add SVE notes 2020-01-23 15:34:04 +00:00
arm_ldst.h target/arm: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
arm-powerctl.c arm/arm-powerctl: rebuild hflags after setting CP15 bits in arm_set_cpu_on() 2019-12-20 14:03:00 +00:00
arm-powerctl.h
arm-semi.c target/arm/arm-semi: Don't let the guest close stdin/stdout/stderr 2020-01-30 16:02:01 +00:00
cpu64.c target/arm: Implement ARMv8.1-VMID16 extension 2020-02-13 14:30:51 +00:00
cpu-param.h target/arm: Add mmu_idx for EL1 and EL2 w/ PAN enabled 2020-02-13 14:14:53 +00:00
cpu-qom.h target/arm: Add the hypervisor virtual counter 2020-02-07 14:04:25 +00:00
cpu.c target/arm: Enable ARMv8.2-ATS1E1 in -cpu max 2020-02-13 14:14:54 +00:00
cpu.h target/arm: Update MSR access to UAO 2020-02-13 14:14:54 +00:00
crypto_helper.c
debug_helper.c target/arm: Add CONTEXTIDR_EL2 2020-02-07 14:04:21 +00:00
gdbstub64.c
gdbstub.c
helper-a64.c target/arm: Introduce aarch64_pstate_valid_mask 2020-02-13 14:14:54 +00:00
helper-a64.h
helper-sve.h
helper.c target/arm: Implement UAO semantics 2020-02-13 14:14:55 +00:00
helper.h target/arm: ensure we use current exception state after SCR update 2019-12-16 10:52:58 +00:00
idau.h
internals.h target/arm: Update MSR access to UAO 2020-02-13 14:14:54 +00:00
iwmmxt_helper.c
kvm32.c target/arm/kvm: Implement virtual time adjustment 2020-01-30 16:02:06 +00:00
kvm64.c target/arm: Add ID_AA64MMFR2_EL1 2020-02-13 14:14:54 +00:00
kvm_arm.h target/arm/cpu: Add the kvm-no-adjvtime CPU property 2020-01-30 16:02:06 +00:00
kvm-consts.h
kvm-stub.c
kvm.c target/arm/cpu: Add the kvm-no-adjvtime CPU property 2020-01-30 16:02:06 +00:00
m_helper.c target/arm: only update pc after semihosting completes 2020-01-09 11:41:29 +00:00
machine.c target/arm/kvm: Implement virtual time adjustment 2020-01-30 16:02:06 +00:00
Makefile.objs
monitor.c target/arm/monitor: query-cpu-model-expansion crashed qemu when using machine type none 2020-02-07 14:04:21 +00:00
neon_helper.c
op_addsub.h
op_helper.c target/arm: Remove CPSR_RESERVED 2020-02-13 14:14:54 +00:00
pauth_helper.c target/arm: check TGE and E2H flags for EL0 pauth traps 2020-02-07 14:04:26 +00:00
psci.c
sve_helper.c tcg: Search includes from the project root source directory 2020-01-15 15:13:10 -10:00
sve.decode
t16.decode
t32.decode
tlb_helper.c target/arm: Return correct IL bit in merge_syn_data_abort 2020-01-17 14:27:16 +00:00
trace-events
translate-a64.c target/arm: Update MSR access to UAO 2020-02-13 14:14:54 +00:00
translate-a64.h
translate-sve.c tcg: Search includes from the project root source directory 2020-01-15 15:13:10 -10:00
translate-vfp.inc.c target/arm: Handle trapping to EL2 of AArch32 VMRS instructions 2019-12-16 10:46:34 +00:00
translate.c target/arm: Split out aarch32_cpsr_valid_mask 2020-02-13 14:14:54 +00:00
translate.h target/arm: Update get_a64_user_mem_index for VHE 2020-02-07 14:04:26 +00:00
vec_helper.c
vfp_helper.c target/arm: Handle trapping to EL2 of AArch32 VMRS instructions 2019-12-16 10:46:34 +00:00
vfp-uncond.decode
vfp.decode