9cb11fd753
Since the BSP bit is writable on real hardware, during reset all the CPUs which were not chosen to be the BSP should have their BSP bit cleared. This fix is required for KVM to work correctly when it changes the BSP bit. An additional fix is required for QEMU tcg to allow software to change the BSP bit. Signed-off-by: Nadav Amit <namit@cs.technion.ac.il> Message-Id: <1427932716-11800-1-git-send-email-namit@cs.technion.ac.il> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
33 lines
1.0 KiB
C
33 lines
1.0 KiB
C
#ifndef APIC_H
|
|
#define APIC_H
|
|
|
|
#include "qemu-common.h"
|
|
|
|
/* apic.c */
|
|
void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode,
|
|
uint8_t vector_num, uint8_t trigger_mode);
|
|
int apic_accept_pic_intr(DeviceState *s);
|
|
void apic_deliver_pic_intr(DeviceState *s, int level);
|
|
void apic_deliver_nmi(DeviceState *d);
|
|
int apic_get_interrupt(DeviceState *s);
|
|
void apic_reset_irq_delivered(void);
|
|
int apic_get_irq_delivered(void);
|
|
void cpu_set_apic_base(DeviceState *s, uint64_t val);
|
|
uint64_t cpu_get_apic_base(DeviceState *s);
|
|
void cpu_set_apic_tpr(DeviceState *s, uint8_t val);
|
|
uint8_t cpu_get_apic_tpr(DeviceState *s);
|
|
void apic_init_reset(DeviceState *s);
|
|
void apic_sipi(DeviceState *s);
|
|
void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip,
|
|
TPRAccess access);
|
|
void apic_poll_irq(DeviceState *d);
|
|
void apic_designate_bsp(DeviceState *d, bool bsp);
|
|
|
|
/* pc.c */
|
|
DeviceState *cpu_get_current_apic(void);
|
|
|
|
/* cpu.c */
|
|
bool cpu_is_bsp(X86CPU *cpu);
|
|
|
|
#endif
|