1877069c9d
Support HACE28: Hash HMAC Key Buffer Base Address Register. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220426021120.28255-2-steven_lee@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
45 lines
906 B
C
45 lines
906 B
C
/*
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* ASPEED Hash and Crypto Engine
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*
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* Copyright (C) 2021 IBM Corp.
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef ASPEED_HACE_H
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#define ASPEED_HACE_H
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#include "hw/sysbus.h"
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#define TYPE_ASPEED_HACE "aspeed.hace"
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#define TYPE_ASPEED_AST2400_HACE TYPE_ASPEED_HACE "-ast2400"
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#define TYPE_ASPEED_AST2500_HACE TYPE_ASPEED_HACE "-ast2500"
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#define TYPE_ASPEED_AST2600_HACE TYPE_ASPEED_HACE "-ast2600"
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OBJECT_DECLARE_TYPE(AspeedHACEState, AspeedHACEClass, ASPEED_HACE)
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#define ASPEED_HACE_NR_REGS (0x64 >> 2)
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struct AspeedHACEState {
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SysBusDevice parent;
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MemoryRegion iomem;
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qemu_irq irq;
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uint32_t regs[ASPEED_HACE_NR_REGS];
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MemoryRegion *dram_mr;
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AddressSpace dram_as;
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};
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struct AspeedHACEClass {
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SysBusDeviceClass parent_class;
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uint32_t src_mask;
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uint32_t dest_mask;
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uint32_t key_mask;
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uint32_t hash_mask;
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};
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#endif /* _ASPEED_HACE_H_ */
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