1764ad70ce
QEMU coding style recommends using structure typedefs. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
622 lines
18 KiB
C
622 lines
18 KiB
C
/*
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* QEMU Motorola 68k CPU
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "cpu.h"
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#include "migration/vmstate.h"
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#include "fpu/softfloat.h"
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static void m68k_cpu_set_pc(CPUState *cs, vaddr value)
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{
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M68kCPU *cpu = M68K_CPU(cs);
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cpu->env.pc = value;
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}
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static vaddr m68k_cpu_get_pc(CPUState *cs)
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{
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M68kCPU *cpu = M68K_CPU(cs);
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return cpu->env.pc;
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}
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static void m68k_restore_state_to_opc(CPUState *cs,
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const TranslationBlock *tb,
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const uint64_t *data)
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{
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M68kCPU *cpu = M68K_CPU(cs);
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int cc_op = data[1];
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cpu->env.pc = data[0];
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if (cc_op != CC_OP_DYNAMIC) {
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cpu->env.cc_op = cc_op;
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}
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}
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static bool m68k_cpu_has_work(CPUState *cs)
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{
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return cs->interrupt_request & CPU_INTERRUPT_HARD;
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}
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static void m68k_set_feature(CPUM68KState *env, int feature)
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{
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env->features |= BIT_ULL(feature);
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}
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static void m68k_unset_feature(CPUM68KState *env, int feature)
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{
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env->features &= ~BIT_ULL(feature);
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}
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static void m68k_cpu_reset_hold(Object *obj)
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{
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CPUState *s = CPU(obj);
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M68kCPU *cpu = M68K_CPU(s);
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M68kCPUClass *mcc = M68K_CPU_GET_CLASS(cpu);
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CPUM68KState *env = &cpu->env;
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floatx80 nan = floatx80_default_nan(NULL);
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int i;
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if (mcc->parent_phases.hold) {
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mcc->parent_phases.hold(obj);
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}
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memset(env, 0, offsetof(CPUM68KState, end_reset_fields));
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#ifdef CONFIG_USER_ONLY
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cpu_m68k_set_sr(env, 0);
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#else
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cpu_m68k_set_sr(env, SR_S | SR_I);
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#endif
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for (i = 0; i < 8; i++) {
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env->fregs[i].d = nan;
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}
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cpu_m68k_set_fpcr(env, 0);
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env->fpsr = 0;
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/* TODO: We should set PC from the interrupt vector. */
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env->pc = 0;
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}
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static void m68k_cpu_disas_set_info(CPUState *s, disassemble_info *info)
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{
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info->print_insn = print_insn_m68k;
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info->mach = 0;
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}
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/* CPU models */
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static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model)
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{
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ObjectClass *oc;
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char *typename;
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typename = g_strdup_printf(M68K_CPU_TYPE_NAME("%s"), cpu_model);
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oc = object_class_by_name(typename);
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g_free(typename);
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return oc;
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}
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static void m5206_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
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m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV);
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}
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/* Base feature set, including isns. for m68k family */
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static void m68000_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_M68K);
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m68k_set_feature(env, M68K_FEATURE_USP);
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m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
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m68k_set_feature(env, M68K_FEATURE_MOVEP);
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}
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/*
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* Adds BKPT, MOVE-from-SR *now priv instr, and MOVEC, MOVES, RTD
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*/
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static void m68010_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68000_cpu_initfn(obj);
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m68k_set_feature(env, M68K_FEATURE_M68010);
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m68k_set_feature(env, M68K_FEATURE_RTD);
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m68k_set_feature(env, M68K_FEATURE_BKPT);
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m68k_set_feature(env, M68K_FEATURE_MOVEC);
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m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV);
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}
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/*
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* Adds BFCHG, BFCLR, BFEXTS, BFEXTU, BFFFO, BFINS, BFSET, BFTST, CAS, CAS2,
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* CHK2, CMP2, DIVSL, DIVUL, EXTB, PACK, TRAPcc, UNPK.
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*
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* 68020/30 only:
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* CALLM, cpBcc, cpDBcc, cpGEN, cpRESTORE, cpSAVE, cpScc, cpTRAPcc
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*/
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static void m68020_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68010_cpu_initfn(obj);
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m68k_unset_feature(env, M68K_FEATURE_M68010);
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m68k_set_feature(env, M68K_FEATURE_M68020);
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m68k_set_feature(env, M68K_FEATURE_QUAD_MULDIV);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_BCCL);
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m68k_set_feature(env, M68K_FEATURE_BITFIELD);
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m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
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m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
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m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
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m68k_set_feature(env, M68K_FEATURE_FPU);
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m68k_set_feature(env, M68K_FEATURE_CAS);
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m68k_set_feature(env, M68K_FEATURE_CHK2);
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m68k_set_feature(env, M68K_FEATURE_MSP);
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m68k_set_feature(env, M68K_FEATURE_UNALIGNED_DATA);
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m68k_set_feature(env, M68K_FEATURE_TRAPCC);
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}
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/*
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* Adds: PFLUSH (*5)
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* 68030 Only: PFLUSHA (*5), PLOAD (*5), PMOVE
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* 68030/40 Only: PTEST
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*
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* NOTES:
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* 5. Not valid on MC68EC030
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*/
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static void m68030_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68020_cpu_initfn(obj);
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m68k_unset_feature(env, M68K_FEATURE_M68020);
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m68k_set_feature(env, M68K_FEATURE_M68030);
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}
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/*
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* Adds: CINV, CPUSH
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* Adds all with Note *2: FABS, FSABS, FDABS, FADD, FSADD, FDADD, FBcc, FCMP,
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* FDBcc, FDIV, FSDIV, FDDIV, FMOVE, FSMOVE, FDMOVE,
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* FMOVEM, FMUL, FSMUL, FDMUL, FNEG, FSNEG, FDNEG, FNOP,
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* FRESTORE, FSAVE, FScc, FSQRT, FSSQRT, FDSQRT, FSUB,
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* FSSUB, FDSUB, FTRAPcc, FTST
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*
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* Adds with Notes *2, and *3: FACOS, FASIN, FATAN, FATANH, FCOS, FCOSH, FETOX,
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* FETOXM, FGETEXP, FGETMAN, FINT, FINTRZ, FLOG10,
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* FLOG2, FLOGN, FLOGNP1, FMOD, FMOVECR, FREM,
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* FSCALE, FSGLDIV, FSGLMUL, FSIN, FSINCOS, FSINH,
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* FTAN, FTANH, FTENTOX, FTWOTOX
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* NOTES:
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* 2. Not applicable to the MC68EC040, MC68LC040, MC68EC060, and MC68LC060.
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* 3. These are software-supported instructions on the MC68040 and MC68060.
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*/
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static void m68040_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68030_cpu_initfn(obj);
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m68k_unset_feature(env, M68K_FEATURE_M68030);
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m68k_set_feature(env, M68K_FEATURE_M68040);
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}
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/*
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* Adds: PLPA
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* Adds all with Note *2: CAS, CAS2, MULS, MULU, CHK2, CMP2, DIVS, DIVU
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* All Fxxxx instructions are as per m68040 with exception to; FMOVEM NOTE3
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*
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* Does NOT implement MOVEP
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*
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* NOTES:
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* 2. Not applicable to the MC68EC040, MC68LC040, MC68EC060, and MC68LC060.
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* 3. These are software-supported instructions on the MC68040 and MC68060.
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*/
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static void m68060_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68040_cpu_initfn(obj);
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m68k_unset_feature(env, M68K_FEATURE_M68040);
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m68k_set_feature(env, M68K_FEATURE_M68060);
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m68k_unset_feature(env, M68K_FEATURE_MOVEP);
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/* Implemented as a software feature */
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m68k_unset_feature(env, M68K_FEATURE_QUAD_MULDIV);
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}
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static void m5208_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
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m68k_set_feature(env, M68K_FEATURE_USP);
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m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV);
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}
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static void cfv4e_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_CF_FPU);
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m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
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m68k_set_feature(env, M68K_FEATURE_USP);
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m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV);
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}
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static void any_cpu_initfn(Object *obj)
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{
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M68kCPU *cpu = M68K_CPU(obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_CF_FPU);
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/*
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* MAC and EMAC are mututally exclusive, so pick EMAC.
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* It's mostly backwards compatible.
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*/
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m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
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m68k_set_feature(env, M68K_FEATURE_CF_EMAC_B);
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m68k_set_feature(env, M68K_FEATURE_USP);
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m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
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m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
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m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV);
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}
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static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)
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{
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CPUState *cs = CPU(dev);
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M68kCPU *cpu = M68K_CPU(dev);
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M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev);
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Error *local_err = NULL;
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register_m68k_insns(&cpu->env);
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cpu_exec_realizefn(cs, &local_err);
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if (local_err != NULL) {
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error_propagate(errp, local_err);
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return;
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}
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m68k_cpu_init_gdb(cpu);
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cpu_reset(cs);
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qemu_init_vcpu(cs);
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mcc->parent_realize(dev, errp);
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}
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#if !defined(CONFIG_USER_ONLY)
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static bool fpu_needed(void *opaque)
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{
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M68kCPU *s = opaque;
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return m68k_feature(&s->env, M68K_FEATURE_CF_FPU) ||
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m68k_feature(&s->env, M68K_FEATURE_FPU);
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}
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typedef struct m68k_FPReg_tmp {
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FPReg *parent;
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uint64_t tmp_mant;
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uint16_t tmp_exp;
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} m68k_FPReg_tmp;
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static void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, floatx80 f)
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{
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CPU_LDoubleU temp;
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temp.d = f;
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*pmant = temp.l.lower;
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*pexp = temp.l.upper;
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}
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static floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper)
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{
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CPU_LDoubleU temp;
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temp.l.upper = upper;
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temp.l.lower = mant;
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return temp.d;
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}
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static int freg_pre_save(void *opaque)
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{
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m68k_FPReg_tmp *tmp = opaque;
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cpu_get_fp80(&tmp->tmp_mant, &tmp->tmp_exp, tmp->parent->d);
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return 0;
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}
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static int freg_post_load(void *opaque, int version)
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{
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m68k_FPReg_tmp *tmp = opaque;
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tmp->parent->d = cpu_set_fp80(tmp->tmp_mant, tmp->tmp_exp);
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return 0;
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}
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static const VMStateDescription vmstate_freg_tmp = {
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.name = "freg_tmp",
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.post_load = freg_post_load,
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.pre_save = freg_pre_save,
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.fields = (const VMStateField[]) {
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VMSTATE_UINT64(tmp_mant, m68k_FPReg_tmp),
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VMSTATE_UINT16(tmp_exp, m68k_FPReg_tmp),
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VMSTATE_END_OF_LIST()
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}
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};
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static const VMStateDescription vmstate_freg = {
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.name = "freg",
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.fields = (const VMStateField[]) {
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VMSTATE_WITH_TMP(FPReg, m68k_FPReg_tmp, vmstate_freg_tmp),
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VMSTATE_END_OF_LIST()
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}
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};
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static int fpu_post_load(void *opaque, int version)
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{
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M68kCPU *s = opaque;
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cpu_m68k_restore_fp_status(&s->env);
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return 0;
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}
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const VMStateDescription vmmstate_fpu = {
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.name = "cpu/fpu",
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.version_id = 1,
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.minimum_version_id = 1,
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.needed = fpu_needed,
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.post_load = fpu_post_load,
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.fields = (const VMStateField[]) {
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VMSTATE_UINT32(env.fpcr, M68kCPU),
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VMSTATE_UINT32(env.fpsr, M68kCPU),
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VMSTATE_STRUCT_ARRAY(env.fregs, M68kCPU, 8, 0, vmstate_freg, FPReg),
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VMSTATE_STRUCT(env.fp_result, M68kCPU, 0, vmstate_freg, FPReg),
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VMSTATE_END_OF_LIST()
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}
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};
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static bool cf_spregs_needed(void *opaque)
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{
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M68kCPU *s = opaque;
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return m68k_feature(&s->env, M68K_FEATURE_CF_ISA_A);
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}
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const VMStateDescription vmstate_cf_spregs = {
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.name = "cpu/cf_spregs",
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.version_id = 1,
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.minimum_version_id = 1,
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.needed = cf_spregs_needed,
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.fields = (const VMStateField[]) {
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VMSTATE_UINT64_ARRAY(env.macc, M68kCPU, 4),
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VMSTATE_UINT32(env.macsr, M68kCPU),
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VMSTATE_UINT32(env.mac_mask, M68kCPU),
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VMSTATE_UINT32(env.rambar0, M68kCPU),
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VMSTATE_UINT32(env.mbar, M68kCPU),
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VMSTATE_END_OF_LIST()
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}
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};
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static bool cpu_68040_mmu_needed(void *opaque)
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{
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M68kCPU *s = opaque;
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return m68k_feature(&s->env, M68K_FEATURE_M68040);
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}
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const VMStateDescription vmstate_68040_mmu = {
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.name = "cpu/68040_mmu",
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.version_id = 1,
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.minimum_version_id = 1,
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.needed = cpu_68040_mmu_needed,
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.fields = (const VMStateField[]) {
|
|
VMSTATE_UINT32(env.mmu.ar, M68kCPU),
|
|
VMSTATE_UINT32(env.mmu.ssw, M68kCPU),
|
|
VMSTATE_UINT16(env.mmu.tcr, M68kCPU),
|
|
VMSTATE_UINT32(env.mmu.urp, M68kCPU),
|
|
VMSTATE_UINT32(env.mmu.srp, M68kCPU),
|
|
VMSTATE_BOOL(env.mmu.fault, M68kCPU),
|
|
VMSTATE_UINT32_ARRAY(env.mmu.ttr, M68kCPU, 4),
|
|
VMSTATE_UINT32(env.mmu.mmusr, M68kCPU),
|
|
VMSTATE_END_OF_LIST()
|
|
}
|
|
};
|
|
|
|
static bool cpu_68040_spregs_needed(void *opaque)
|
|
{
|
|
M68kCPU *s = opaque;
|
|
|
|
return m68k_feature(&s->env, M68K_FEATURE_M68040);
|
|
}
|
|
|
|
const VMStateDescription vmstate_68040_spregs = {
|
|
.name = "cpu/68040_spregs",
|
|
.version_id = 1,
|
|
.minimum_version_id = 1,
|
|
.needed = cpu_68040_spregs_needed,
|
|
.fields = (const VMStateField[]) {
|
|
VMSTATE_UINT32(env.vbr, M68kCPU),
|
|
VMSTATE_UINT32(env.cacr, M68kCPU),
|
|
VMSTATE_UINT32(env.sfc, M68kCPU),
|
|
VMSTATE_UINT32(env.dfc, M68kCPU),
|
|
VMSTATE_END_OF_LIST()
|
|
}
|
|
};
|
|
|
|
static const VMStateDescription vmstate_m68k_cpu = {
|
|
.name = "cpu",
|
|
.version_id = 1,
|
|
.minimum_version_id = 1,
|
|
.fields = (const VMStateField[]) {
|
|
VMSTATE_UINT32_ARRAY(env.dregs, M68kCPU, 8),
|
|
VMSTATE_UINT32_ARRAY(env.aregs, M68kCPU, 8),
|
|
VMSTATE_UINT32(env.pc, M68kCPU),
|
|
VMSTATE_UINT32(env.sr, M68kCPU),
|
|
VMSTATE_INT32(env.current_sp, M68kCPU),
|
|
VMSTATE_UINT32_ARRAY(env.sp, M68kCPU, 3),
|
|
VMSTATE_UINT32(env.cc_op, M68kCPU),
|
|
VMSTATE_UINT32(env.cc_x, M68kCPU),
|
|
VMSTATE_UINT32(env.cc_n, M68kCPU),
|
|
VMSTATE_UINT32(env.cc_v, M68kCPU),
|
|
VMSTATE_UINT32(env.cc_c, M68kCPU),
|
|
VMSTATE_UINT32(env.cc_z, M68kCPU),
|
|
VMSTATE_INT32(env.pending_vector, M68kCPU),
|
|
VMSTATE_INT32(env.pending_level, M68kCPU),
|
|
VMSTATE_END_OF_LIST()
|
|
},
|
|
.subsections = (const VMStateDescription * const []) {
|
|
&vmmstate_fpu,
|
|
&vmstate_cf_spregs,
|
|
&vmstate_68040_mmu,
|
|
&vmstate_68040_spregs,
|
|
NULL
|
|
},
|
|
};
|
|
|
|
#include "hw/core/sysemu-cpu-ops.h"
|
|
|
|
static const struct SysemuCPUOps m68k_sysemu_ops = {
|
|
.get_phys_page_debug = m68k_cpu_get_phys_page_debug,
|
|
};
|
|
#endif /* !CONFIG_USER_ONLY */
|
|
|
|
#include "hw/core/tcg-cpu-ops.h"
|
|
|
|
static const TCGCPUOps m68k_tcg_ops = {
|
|
.initialize = m68k_tcg_init,
|
|
.restore_state_to_opc = m68k_restore_state_to_opc,
|
|
|
|
#ifndef CONFIG_USER_ONLY
|
|
.tlb_fill = m68k_cpu_tlb_fill,
|
|
.cpu_exec_interrupt = m68k_cpu_exec_interrupt,
|
|
.do_interrupt = m68k_cpu_do_interrupt,
|
|
.do_transaction_failed = m68k_cpu_transaction_failed,
|
|
#endif /* !CONFIG_USER_ONLY */
|
|
};
|
|
|
|
static void m68k_cpu_class_init(ObjectClass *c, void *data)
|
|
{
|
|
M68kCPUClass *mcc = M68K_CPU_CLASS(c);
|
|
CPUClass *cc = CPU_CLASS(c);
|
|
DeviceClass *dc = DEVICE_CLASS(c);
|
|
ResettableClass *rc = RESETTABLE_CLASS(c);
|
|
|
|
device_class_set_parent_realize(dc, m68k_cpu_realizefn,
|
|
&mcc->parent_realize);
|
|
resettable_class_set_parent_phases(rc, NULL, m68k_cpu_reset_hold, NULL,
|
|
&mcc->parent_phases);
|
|
|
|
cc->class_by_name = m68k_cpu_class_by_name;
|
|
cc->has_work = m68k_cpu_has_work;
|
|
cc->dump_state = m68k_cpu_dump_state;
|
|
cc->set_pc = m68k_cpu_set_pc;
|
|
cc->get_pc = m68k_cpu_get_pc;
|
|
cc->gdb_read_register = m68k_cpu_gdb_read_register;
|
|
cc->gdb_write_register = m68k_cpu_gdb_write_register;
|
|
#if !defined(CONFIG_USER_ONLY)
|
|
dc->vmsd = &vmstate_m68k_cpu;
|
|
cc->sysemu_ops = &m68k_sysemu_ops;
|
|
#endif
|
|
cc->disas_set_info = m68k_cpu_disas_set_info;
|
|
|
|
cc->gdb_num_core_regs = 18;
|
|
cc->tcg_ops = &m68k_tcg_ops;
|
|
}
|
|
|
|
static void m68k_cpu_class_init_cf_core(ObjectClass *c, void *data)
|
|
{
|
|
CPUClass *cc = CPU_CLASS(c);
|
|
|
|
cc->gdb_core_xml_file = "cf-core.xml";
|
|
}
|
|
|
|
#define DEFINE_M68K_CPU_TYPE_CF(model) \
|
|
{ \
|
|
.name = M68K_CPU_TYPE_NAME(#model), \
|
|
.instance_init = model##_cpu_initfn, \
|
|
.parent = TYPE_M68K_CPU, \
|
|
.class_init = m68k_cpu_class_init_cf_core \
|
|
}
|
|
|
|
static void m68k_cpu_class_init_m68k_core(ObjectClass *c, void *data)
|
|
{
|
|
CPUClass *cc = CPU_CLASS(c);
|
|
|
|
cc->gdb_core_xml_file = "m68k-core.xml";
|
|
}
|
|
|
|
#define DEFINE_M68K_CPU_TYPE_M68K(model) \
|
|
{ \
|
|
.name = M68K_CPU_TYPE_NAME(#model), \
|
|
.instance_init = model##_cpu_initfn, \
|
|
.parent = TYPE_M68K_CPU, \
|
|
.class_init = m68k_cpu_class_init_m68k_core \
|
|
}
|
|
|
|
static const TypeInfo m68k_cpus_type_infos[] = {
|
|
{ /* base class should be registered first */
|
|
.name = TYPE_M68K_CPU,
|
|
.parent = TYPE_CPU,
|
|
.instance_size = sizeof(M68kCPU),
|
|
.instance_align = __alignof(M68kCPU),
|
|
.abstract = true,
|
|
.class_size = sizeof(M68kCPUClass),
|
|
.class_init = m68k_cpu_class_init,
|
|
},
|
|
DEFINE_M68K_CPU_TYPE_M68K(m68000),
|
|
DEFINE_M68K_CPU_TYPE_M68K(m68010),
|
|
DEFINE_M68K_CPU_TYPE_M68K(m68020),
|
|
DEFINE_M68K_CPU_TYPE_M68K(m68030),
|
|
DEFINE_M68K_CPU_TYPE_M68K(m68040),
|
|
DEFINE_M68K_CPU_TYPE_M68K(m68060),
|
|
DEFINE_M68K_CPU_TYPE_CF(m5206),
|
|
DEFINE_M68K_CPU_TYPE_CF(m5208),
|
|
DEFINE_M68K_CPU_TYPE_CF(cfv4e),
|
|
DEFINE_M68K_CPU_TYPE_CF(any),
|
|
};
|
|
|
|
DEFINE_TYPES(m68k_cpus_type_infos)
|