3407ad0e7a
The cpu_env tcg variable will be used by both the AArch32 and AArch64 handling code. Unstaticify it, so that both sides can make use of it. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-5-git-send-email-peter.maydell@linaro.org Message-id: 1368505980-17151-3-git-send-email-john.rigby@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
30 lines
715 B
C
30 lines
715 B
C
#ifndef TARGET_ARM_TRANSLATE_H
|
|
#define TARGET_ARM_TRANSLATE_H
|
|
|
|
/* internal defines */
|
|
typedef struct DisasContext {
|
|
target_ulong pc;
|
|
int is_jmp;
|
|
/* Nonzero if this instruction has been conditionally skipped. */
|
|
int condjmp;
|
|
/* The label that will be jumped to when the instruction is skipped. */
|
|
int condlabel;
|
|
/* Thumb-2 conditional execution bits. */
|
|
int condexec_mask;
|
|
int condexec_cond;
|
|
struct TranslationBlock *tb;
|
|
int singlestep_enabled;
|
|
int thumb;
|
|
int bswap_code;
|
|
#if !defined(CONFIG_USER_ONLY)
|
|
int user;
|
|
#endif
|
|
int vfp_enabled;
|
|
int vec_len;
|
|
int vec_stride;
|
|
} DisasContext;
|
|
|
|
extern TCGv_ptr cpu_env;
|
|
|
|
#endif /* TARGET_ARM_TRANSLATE_H */
|