qemu/include/hw/riscv
Bin Meng 81e94379f7
riscv: sifive_u: Remove handcrafted clock nodes for UART and ethernet
In the past we did not have a model for PRCI, hence two handcrafted
clock nodes ("/soc/ethclk" and "/soc/uartclk") were created for the
purpose of supplying hard-coded clock frequencies. But now since we
have added the PRCI support in QEMU, we don't need them any more.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-09-17 08:42:49 -07:00
..
boot.h
riscv_hart.h
riscv_htif.h
sifive_clint.h
sifive_cpu.h
sifive_e_prci.h
sifive_e.h
sifive_gpio.h
sifive_plic.h
sifive_test.h
sifive_u_otp.h
sifive_u_prci.h
sifive_u.h
sifive_uart.h
spike.h
virt.h