Peter Crosthwaite 14ca2e462e arm: xlnx-zynqmp: Add GEM support ... There are 4x Cadence GEMs in ZynqMP. Add them. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 7d3e68e5495d145255f0ee567046415e3a26d67e.1431381507.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2015-05-18 16:41:11 +01:00
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allwinner-a10.c
armv7m.c
boot.c
collie.c
cubieboard.c
digic_boards.c
digic.c
exynos4_boards.c
exynos4210.c
gumstix.c
highbank.c	hw/arm/highbank.c: Wire FIQ between CPU <> GIC	2015-05-12 11:57:19 +01:00
integratorcp.c
kzm.c
mainstone.c
Makefile.objs	arm: Introduce Xilinx ZynqMP SoC	2015-05-18 16:41:09 +01:00
musicpal.c
netduino2.c
nseries.c	hw/arm/nseries: convert ffs(3) to ctz32()	2015-04-28 15:36:08 +02:00
omap1.c	Convert ffs() != 0 callers to ctz32()	2015-04-28 15:36:08 +02:00
omap2.c
omap_sx1.c
palm.c
pxa2xx_gpio.c	Convert (ffs(val) - 1) to ctz32(val)	2015-04-28 15:36:08 +02:00
pxa2xx_pic.c
pxa2xx.c
realview.c
spitz.c
stellaris.c
stm32f205_soc.c
strongarm.c	Convert (ffs(val) - 1) to ctz32(val)	2015-04-28 15:36:08 +02:00
strongarm.h
tosa.c
versatilepb.c
vexpress.c	hw/arm/vexpress.c: Wire FIQ between CPU <> GIC	2015-05-12 11:57:18 +01:00
virt.c	hw/arm/virt.c: Wire FIQ between CPU <> GIC	2015-05-12 11:57:18 +01:00
xilinx_zynq.c
xlnx-zynqmp.c	arm: xlnx-zynqmp: Add GEM support	2015-05-18 16:41:11 +01:00
z2.c