c398c76187
The migration tests spend a lot of time waiting for a sign of live of the guest on the serial console. The aarch64 migration code only outputs "B"s every couple of seconds (at least it takes more than 4 seconds between each characeter on my x86 laptop). There are a lot of migration tests, and if each test that checks for a successful migration waits for these characters before and after migration, the wait time sums up to multiple minutes! Let's use a shorter delay to speed things up. While we're at it, also remove a superfluous masking with 0xff - we're reading and storing bytes, so the upper bits of the register do not matter anyway. With these changes, the test runs twice as fast on my laptop, decreasing the total run time from approx. 8 minutes to only 4 minutes! Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20220819053802.296584-3-thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220822165608.2980552-4-alex.bennee@linaro.org>
75 lines
1.8 KiB
ArmAsm
75 lines
1.8 KiB
ArmAsm
#
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# Copyright (c) 2018 Red Hat, Inc. and/or its affiliates
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#
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# Author:
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# Wei Huang <wei@redhat.com>
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#
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# This work is licensed under the terms of the GNU GPL, version 2 or later.
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# See the COPYING file in the top-level directory.
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#
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# Note: Please make sure the compiler compiles the assembly code below with
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# pc-relative address. Also the branch instructions should use relative
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# addresses only.
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#include "../migration-test.h"
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.section .text
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.globl _start
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_start:
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/* disable MMU to use phys mem address */
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mrs x0, sctlr_el1
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bic x0, x0, #(1<<0)
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msr sctlr_el1, x0
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isb
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/* traverse test memory region */
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mov x0, #ARM_TEST_MEM_START
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mov x1, #ARM_TEST_MEM_END
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/* output char 'A' to PL011 */
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mov w3, 'A'
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mov x2, #ARM_MACH_VIRT_UART
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strb w3, [x2]
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/* clean up memory */
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mov w3, #0
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mov x4, x0
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clean:
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strb w3, [x4]
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add x4, x4, #TEST_MEM_PAGE_SIZE
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cmp x4, x1
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ble clean
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/* w5 keeps a counter so we can limit the output speed */
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mov w5, #0
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/* main body */
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mainloop:
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mov x4, x0
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innerloop:
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/* increment the first byte of each page by 1 */
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ldrb w3, [x4]
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add w3, w3, #1
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strb w3, [x4]
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/* make sure QEMU user space can see consistent data as MMU is off */
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dc civac, x4
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add x4, x4, #TEST_MEM_PAGE_SIZE
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cmp x4, x1
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blt innerloop
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add w5, w5, #1
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and w5, w5, #0x1f
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cmp w5, #0
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bne mainloop
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/* output char 'B' to PL011 */
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mov w3, 'B'
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strb w3, [x2]
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b mainloop
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