14db18997e
Always use the gen_conditional_store implementation that uses atomic_cmpxchg. Make sure and clear reserve_addr across most interrupts crossing the cpu_loop. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
503 lines
20 KiB
C
503 lines
20 KiB
C
/*
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* qemu user cpu loop
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*
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* Copyright (c) 2003-2008 Fabrice Bellard
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "qemu.h"
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#include "cpu_loop-common.h"
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static inline uint64_t cpu_ppc_get_tb(CPUPPCState *env)
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{
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return cpu_get_host_ticks();
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}
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uint64_t cpu_ppc_load_tbl(CPUPPCState *env)
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{
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return cpu_ppc_get_tb(env);
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}
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uint32_t cpu_ppc_load_tbu(CPUPPCState *env)
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{
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return cpu_ppc_get_tb(env) >> 32;
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}
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uint64_t cpu_ppc_load_atbl(CPUPPCState *env)
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{
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return cpu_ppc_get_tb(env);
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}
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uint32_t cpu_ppc_load_atbu(CPUPPCState *env)
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{
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return cpu_ppc_get_tb(env) >> 32;
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}
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uint32_t cpu_ppc601_load_rtcu(CPUPPCState *env)
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__attribute__ (( alias ("cpu_ppc_load_tbu") ));
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uint32_t cpu_ppc601_load_rtcl(CPUPPCState *env)
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{
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return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
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}
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/* XXX: to be fixed */
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int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp)
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{
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return -1;
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}
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int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val)
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{
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return -1;
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}
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void cpu_loop(CPUPPCState *env)
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{
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CPUState *cs = CPU(ppc_env_get_cpu(env));
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target_siginfo_t info;
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int trapnr, sig;
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target_ulong ret;
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for(;;) {
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bool arch_interrupt;
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cpu_exec_start(cs);
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trapnr = cpu_exec(cs);
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cpu_exec_end(cs);
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process_queued_cpu_work(cs);
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arch_interrupt = true;
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switch (trapnr) {
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case POWERPC_EXCP_NONE:
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/* Just go on */
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break;
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case POWERPC_EXCP_CRITICAL: /* Critical input */
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cpu_abort(cs, "Critical interrupt while in user mode. "
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"Aborting\n");
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break;
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case POWERPC_EXCP_MCHECK: /* Machine check exception */
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cpu_abort(cs, "Machine check exception while in user mode. "
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"Aborting\n");
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break;
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case POWERPC_EXCP_DSI: /* Data storage exception */
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/* XXX: check this. Seems bugged */
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switch (env->error_code & 0xFF000000) {
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case 0x40000000:
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case 0x42000000:
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info.si_signo = TARGET_SIGSEGV;
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info.si_errno = 0;
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info.si_code = TARGET_SEGV_MAPERR;
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break;
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case 0x04000000:
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info.si_signo = TARGET_SIGILL;
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info.si_errno = 0;
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info.si_code = TARGET_ILL_ILLADR;
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break;
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case 0x08000000:
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info.si_signo = TARGET_SIGSEGV;
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info.si_errno = 0;
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info.si_code = TARGET_SEGV_ACCERR;
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break;
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default:
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/* Let's send a regular segfault... */
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EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
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env->error_code);
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info.si_signo = TARGET_SIGSEGV;
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info.si_errno = 0;
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info.si_code = TARGET_SEGV_MAPERR;
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break;
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}
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info._sifields._sigfault._addr = env->spr[SPR_DAR];
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queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
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break;
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case POWERPC_EXCP_ISI: /* Instruction storage exception */
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/* XXX: check this */
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switch (env->error_code & 0xFF000000) {
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case 0x40000000:
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info.si_signo = TARGET_SIGSEGV;
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info.si_errno = 0;
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info.si_code = TARGET_SEGV_MAPERR;
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break;
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case 0x10000000:
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case 0x08000000:
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info.si_signo = TARGET_SIGSEGV;
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info.si_errno = 0;
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info.si_code = TARGET_SEGV_ACCERR;
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break;
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default:
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/* Let's send a regular segfault... */
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EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
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env->error_code);
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info.si_signo = TARGET_SIGSEGV;
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info.si_errno = 0;
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info.si_code = TARGET_SEGV_MAPERR;
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break;
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}
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info._sifields._sigfault._addr = env->nip - 4;
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queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
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break;
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case POWERPC_EXCP_EXTERNAL: /* External input */
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cpu_abort(cs, "External interrupt while in user mode. "
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"Aborting\n");
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break;
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case POWERPC_EXCP_ALIGN: /* Alignment exception */
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/* XXX: check this */
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info.si_signo = TARGET_SIGBUS;
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info.si_errno = 0;
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info.si_code = TARGET_BUS_ADRALN;
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info._sifields._sigfault._addr = env->nip;
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queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
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break;
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case POWERPC_EXCP_PROGRAM: /* Program exception */
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case POWERPC_EXCP_HV_EMU: /* HV emulation */
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/* XXX: check this */
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switch (env->error_code & ~0xF) {
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case POWERPC_EXCP_FP:
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info.si_signo = TARGET_SIGFPE;
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info.si_errno = 0;
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switch (env->error_code & 0xF) {
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case POWERPC_EXCP_FP_OX:
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info.si_code = TARGET_FPE_FLTOVF;
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break;
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case POWERPC_EXCP_FP_UX:
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info.si_code = TARGET_FPE_FLTUND;
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break;
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case POWERPC_EXCP_FP_ZX:
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case POWERPC_EXCP_FP_VXZDZ:
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info.si_code = TARGET_FPE_FLTDIV;
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break;
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case POWERPC_EXCP_FP_XX:
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info.si_code = TARGET_FPE_FLTRES;
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break;
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case POWERPC_EXCP_FP_VXSOFT:
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info.si_code = TARGET_FPE_FLTINV;
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break;
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case POWERPC_EXCP_FP_VXSNAN:
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case POWERPC_EXCP_FP_VXISI:
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case POWERPC_EXCP_FP_VXIDI:
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case POWERPC_EXCP_FP_VXIMZ:
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case POWERPC_EXCP_FP_VXVC:
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case POWERPC_EXCP_FP_VXSQRT:
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case POWERPC_EXCP_FP_VXCVI:
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info.si_code = TARGET_FPE_FLTSUB;
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break;
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default:
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EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
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env->error_code);
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break;
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}
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break;
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case POWERPC_EXCP_INVAL:
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info.si_signo = TARGET_SIGILL;
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info.si_errno = 0;
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switch (env->error_code & 0xF) {
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case POWERPC_EXCP_INVAL_INVAL:
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info.si_code = TARGET_ILL_ILLOPC;
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break;
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case POWERPC_EXCP_INVAL_LSWX:
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info.si_code = TARGET_ILL_ILLOPN;
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break;
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case POWERPC_EXCP_INVAL_SPR:
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info.si_code = TARGET_ILL_PRVREG;
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break;
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case POWERPC_EXCP_INVAL_FP:
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info.si_code = TARGET_ILL_COPROC;
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break;
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default:
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EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
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env->error_code & 0xF);
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info.si_code = TARGET_ILL_ILLADR;
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break;
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}
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break;
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case POWERPC_EXCP_PRIV:
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info.si_signo = TARGET_SIGILL;
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info.si_errno = 0;
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switch (env->error_code & 0xF) {
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case POWERPC_EXCP_PRIV_OPC:
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info.si_code = TARGET_ILL_PRVOPC;
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break;
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case POWERPC_EXCP_PRIV_REG:
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info.si_code = TARGET_ILL_PRVREG;
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break;
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default:
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EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
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env->error_code & 0xF);
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info.si_code = TARGET_ILL_PRVOPC;
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break;
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}
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break;
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case POWERPC_EXCP_TRAP:
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cpu_abort(cs, "Tried to call a TRAP\n");
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break;
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default:
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/* Should not happen ! */
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cpu_abort(cs, "Unknown program exception (%02x)\n",
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env->error_code);
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break;
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}
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info._sifields._sigfault._addr = env->nip;
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queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
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break;
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case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
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info.si_signo = TARGET_SIGILL;
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info.si_errno = 0;
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info.si_code = TARGET_ILL_COPROC;
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info._sifields._sigfault._addr = env->nip;
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queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
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break;
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case POWERPC_EXCP_SYSCALL: /* System call exception */
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cpu_abort(cs, "Syscall exception while in user mode. "
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"Aborting\n");
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break;
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case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
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info.si_signo = TARGET_SIGILL;
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info.si_errno = 0;
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info.si_code = TARGET_ILL_COPROC;
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info._sifields._sigfault._addr = env->nip;
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queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
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break;
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case POWERPC_EXCP_DECR: /* Decrementer exception */
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cpu_abort(cs, "Decrementer interrupt while in user mode. "
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"Aborting\n");
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break;
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case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
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cpu_abort(cs, "Fix interval timer interrupt while in user mode. "
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"Aborting\n");
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break;
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case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
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cpu_abort(cs, "Watchdog timer interrupt while in user mode. "
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"Aborting\n");
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break;
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case POWERPC_EXCP_DTLB: /* Data TLB error */
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cpu_abort(cs, "Data TLB exception while in user mode. "
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"Aborting\n");
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break;
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case POWERPC_EXCP_ITLB: /* Instruction TLB error */
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cpu_abort(cs, "Instruction TLB exception while in user mode. "
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"Aborting\n");
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break;
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case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
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info.si_signo = TARGET_SIGILL;
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info.si_errno = 0;
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info.si_code = TARGET_ILL_COPROC;
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info._sifields._sigfault._addr = env->nip;
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queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
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break;
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case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
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cpu_abort(cs, "Embedded floating-point data IRQ not handled\n");
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break;
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case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
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cpu_abort(cs, "Embedded floating-point round IRQ not handled\n");
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break;
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case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
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cpu_abort(cs, "Performance monitor exception not handled\n");
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break;
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case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
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cpu_abort(cs, "Doorbell interrupt while in user mode. "
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"Aborting\n");
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break;
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case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
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cpu_abort(cs, "Doorbell critical interrupt while in user mode. "
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"Aborting\n");
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break;
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case POWERPC_EXCP_RESET: /* System reset exception */
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cpu_abort(cs, "Reset interrupt while in user mode. "
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"Aborting\n");
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break;
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case POWERPC_EXCP_DSEG: /* Data segment exception */
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cpu_abort(cs, "Data segment exception while in user mode. "
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"Aborting\n");
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break;
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case POWERPC_EXCP_ISEG: /* Instruction segment exception */
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cpu_abort(cs, "Instruction segment exception "
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"while in user mode. Aborting\n");
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break;
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/* PowerPC 64 with hypervisor mode support */
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case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
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cpu_abort(cs, "Hypervisor decrementer interrupt "
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"while in user mode. Aborting\n");
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break;
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case POWERPC_EXCP_TRACE: /* Trace exception */
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/* Nothing to do:
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* we use this exception to emulate step-by-step execution mode.
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*/
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break;
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/* PowerPC 64 with hypervisor mode support */
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case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
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cpu_abort(cs, "Hypervisor data storage exception "
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"while in user mode. Aborting\n");
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break;
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case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
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cpu_abort(cs, "Hypervisor instruction storage exception "
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"while in user mode. Aborting\n");
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break;
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case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
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cpu_abort(cs, "Hypervisor data segment exception "
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"while in user mode. Aborting\n");
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break;
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case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
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cpu_abort(cs, "Hypervisor instruction segment exception "
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"while in user mode. Aborting\n");
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break;
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case POWERPC_EXCP_VPU: /* Vector unavailable exception */
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info.si_signo = TARGET_SIGILL;
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info.si_errno = 0;
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info.si_code = TARGET_ILL_COPROC;
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info._sifields._sigfault._addr = env->nip;
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queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
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break;
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case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
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cpu_abort(cs, "Programmable interval timer interrupt "
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"while in user mode. Aborting\n");
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break;
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case POWERPC_EXCP_IO: /* IO error exception */
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cpu_abort(cs, "IO error exception while in user mode. "
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"Aborting\n");
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break;
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case POWERPC_EXCP_RUNM: /* Run mode exception */
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cpu_abort(cs, "Run mode exception while in user mode. "
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"Aborting\n");
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break;
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case POWERPC_EXCP_EMUL: /* Emulation trap exception */
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cpu_abort(cs, "Emulation trap exception not handled\n");
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break;
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case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
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cpu_abort(cs, "Instruction fetch TLB exception "
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"while in user-mode. Aborting");
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break;
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case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
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cpu_abort(cs, "Data load TLB exception while in user-mode. "
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"Aborting");
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break;
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case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
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cpu_abort(cs, "Data store TLB exception while in user-mode. "
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"Aborting");
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break;
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case POWERPC_EXCP_FPA: /* Floating-point assist exception */
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cpu_abort(cs, "Floating-point assist exception not handled\n");
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break;
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case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
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cpu_abort(cs, "Instruction address breakpoint exception "
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"not handled\n");
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break;
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case POWERPC_EXCP_SMI: /* System management interrupt */
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cpu_abort(cs, "System management interrupt while in user mode. "
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"Aborting\n");
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break;
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case POWERPC_EXCP_THERM: /* Thermal interrupt */
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cpu_abort(cs, "Thermal interrupt interrupt while in user mode. "
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"Aborting\n");
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break;
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case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
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cpu_abort(cs, "Performance monitor exception not handled\n");
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break;
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case POWERPC_EXCP_VPUA: /* Vector assist exception */
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cpu_abort(cs, "Vector assist exception not handled\n");
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break;
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case POWERPC_EXCP_SOFTP: /* Soft patch exception */
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cpu_abort(cs, "Soft patch exception not handled\n");
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break;
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case POWERPC_EXCP_MAINT: /* Maintenance exception */
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cpu_abort(cs, "Maintenance exception while in user mode. "
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"Aborting\n");
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break;
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case POWERPC_EXCP_STOP: /* stop translation */
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/* We did invalidate the instruction cache. Go on */
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break;
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case POWERPC_EXCP_BRANCH: /* branch instruction: */
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/* We just stopped because of a branch. Go on */
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break;
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case POWERPC_EXCP_SYSCALL_USER:
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/* system call in user-mode emulation */
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/* WARNING:
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* PPC ABI uses overflow flag in cr0 to signal an error
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* in syscalls.
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*/
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env->crf[0] &= ~0x1;
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env->nip += 4;
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ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
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env->gpr[5], env->gpr[6], env->gpr[7],
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env->gpr[8], 0, 0);
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if (ret == -TARGET_ERESTARTSYS) {
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env->nip -= 4;
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break;
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}
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if (ret == (target_ulong)(-TARGET_QEMU_ESIGRETURN)) {
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/* Returning from a successful sigreturn syscall.
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Avoid corrupting register state. */
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break;
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}
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if (ret > (target_ulong)(-515)) {
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env->crf[0] |= 0x1;
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ret = -ret;
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}
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env->gpr[3] = ret;
|
|
break;
|
|
case EXCP_DEBUG:
|
|
sig = gdb_handlesig(cs, TARGET_SIGTRAP);
|
|
if (sig) {
|
|
info.si_signo = sig;
|
|
info.si_errno = 0;
|
|
info.si_code = TARGET_TRAP_BRKPT;
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
|
} else {
|
|
arch_interrupt = false;
|
|
}
|
|
break;
|
|
case EXCP_INTERRUPT:
|
|
/* just indicate that signals should be handled asap */
|
|
break;
|
|
case EXCP_ATOMIC:
|
|
cpu_exec_step_atomic(cs);
|
|
arch_interrupt = false;
|
|
break;
|
|
default:
|
|
cpu_abort(cs, "Unknown exception 0x%x. Aborting\n", trapnr);
|
|
break;
|
|
}
|
|
process_pending_signals(env);
|
|
|
|
/* Most of the traps imply a transition through kernel mode,
|
|
* which implies an REI instruction has been executed. Which
|
|
* means that RX and LOCK_ADDR should be cleared. But there
|
|
* are a few exceptions for traps internal to QEMU.
|
|
*/
|
|
if (arch_interrupt) {
|
|
env->reserve_addr = -1;
|
|
}
|
|
}
|
|
}
|
|
|
|
void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
|
|
{
|
|
int i;
|
|
|
|
#if defined(TARGET_PPC64)
|
|
int flag = (env->insns_flags2 & PPC2_BOOKE206) ? MSR_CM : MSR_SF;
|
|
#if defined(TARGET_ABI32)
|
|
env->msr &= ~((target_ulong)1 << flag);
|
|
#else
|
|
env->msr |= (target_ulong)1 << flag;
|
|
#endif
|
|
#endif
|
|
env->nip = regs->nip;
|
|
for(i = 0; i < 32; i++) {
|
|
env->gpr[i] = regs->gpr[i];
|
|
}
|
|
}
|