qemu/target-mips
Petar Jovanovic 118d1e4f59 target-mips: set carry bit correctly in DSPControl register
First we need to clear the bit and then we set the given value.
Instruction ADDSC sets the bit and instruction ADDWC uses this bit.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-05-19 15:16:20 +02:00
..
cpu-qom.h cpu: Replace do_interrupt() by CPUClass::do_interrupt method 2013-03-12 10:35:55 +01:00
cpu.c cpu: Replace do_interrupt() by CPUClass::do_interrupt method 2013-03-12 10:35:55 +01:00
cpu.h cpu: Replace do_interrupt() by CPUClass::do_interrupt method 2013-03-12 10:35:55 +01:00
dsp_helper.c target-mips: set carry bit correctly in DSPControl register 2013-05-19 15:16:20 +02:00
helper.c cpu: Replace do_interrupt() by CPUClass::do_interrupt method 2013-03-12 10:35:55 +01:00
helper.h target-mips: Use mul[us]2 in [D]MULT[U] insns 2013-02-23 17:25:29 +00:00
lmi_helper.c target-mips: Implement Loongson Multimedia Instructions 2012-09-19 21:40:48 +02:00
machine.c target-mips: Don't overuse CPUState 2012-03-14 22:20:25 +01:00
Makefile.objs target-mips: Add ASE DSP internal functions 2012-10-31 20:24:05 +01:00
mips-defs.h MIPS: Initial support of fulong mini pc (CPU definition) 2010-06-29 23:07:52 +02:00
op_helper.c cpu: Pass CPUState to cpu_interrupt() 2013-03-12 10:35:55 +01:00
TODO target-mips: Change TODO file 2012-10-31 21:37:24 +01:00
translate_init.c target-mips: Add ASE DSP processors 2012-10-31 21:37:20 +01:00
translate.c target-mips: add missing check_dspr2 for multiply instructions 2013-05-08 18:03:31 +02:00