Richard Henderson 118671f02f target/openrisc: Cache constant 0 in DisasContext ...

We are virtually certain to have fetched constant 0 once, at the
beginning of the TB, so we might as well use it elsewhere.

Reviewed-by: Stafford Horne <shorne@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

2021-07-13 08:13:19 -07:00

..

cpu-param.h

…

cpu.c

hw/core: Constify TCGCPUOps

2021-05-26 15:33:59 -07:00

cpu.h

target/openrisc: Move pic_cpu code into CPU object proper

2020-12-15 12:04:30 +00:00

disas.c

…

exception_helper.c

…

exception.c

…

exception.h

…

fpu_helper.c

…

gdbstub.c

…

helper.h

…

insns.decode

…

interrupt_helper.c

…

interrupt.c

…

Kconfig

meson: Introduce target-specific Kconfig

2021-07-09 18:21:34 +02:00

machine.c

migration: Replace migration's JSON writer by the general one

2020-12-19 10:39:16 +01:00

meson.build

…

mmu.c

…

sys_helper.c

Do not include sysemu/sysemu.h if it's not really necessary

2021-05-02 17:24:50 +02:00

translate.c

target/openrisc: Cache constant 0 in DisasContext

2021-07-13 08:13:19 -07:00