qemu/target/arm
Richard Henderson 0fa476c1bb target/arm: Use SVEContLdSt for contiguous stores
Follow the model set up for contiguous loads.  This handles
watchpoints correctly for contiguous stores, recognizing the
exception before any changes to memory.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200508154359.7494-16-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-05-11 11:22:06 +01:00
..
a32-uncond.decode target/arm: Convert Unallocated memory hint 2019-09-05 13:23:03 +01:00
a32.decode target/arm: Convert SVC 2019-09-05 13:23:03 +01:00
arch_dump.c target/arm: Add isar_feature_aa32_vfp_simd 2020-02-28 16:14:57 +00:00
arm_ldst.h target/arm: fetch code with translator_ld 2019-10-28 15:12:38 +00:00
arm-powerctl.c arm/arm-powerctl: rebuild hflags after setting CP15 bits in arm_set_cpu_on() 2019-12-20 14:03:00 +00:00
arm-powerctl.h target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset() 2019-02-28 11:03:04 +00:00
arm-semi.c target/arm/arm-semi: Don't let the guest close stdin/stdout/stderr 2020-01-30 16:02:01 +00:00
cpu64.c target/arm: Use correct variable for setting 'max' cpu's ID_AA64DFR0 2020-05-04 10:32:46 +01:00
cpu-param.h target/arm: Don't use a TLB for ARMMMUIdx_Stage2 2020-05-04 10:32:46 +01:00
cpu-qom.h target/arm: Make cpu_register() available for other files 2020-04-30 15:35:41 +01:00
cpu.c target/arm: Use uint64_t for midr field in CPU state struct 2020-05-04 10:32:46 +01:00
cpu.h target/arm: Use uint64_t for midr field in CPU state struct 2020-05-04 10:32:46 +01:00
crypto_helper.c
debug_helper.c target/arm: Stop assuming DBGDIDR always exists 2020-02-21 16:07:01 +00:00
gdbstub64.c gdbstub: extend GByteArray to read register helpers 2020-03-17 17:38:38 +00:00
gdbstub.c gdbstub: Do not use memset() on GByteArray 2020-04-15 11:38:23 +01:00
helper-a64.c target/arm: Move helper_dc_zva to helper-a64.c 2020-03-05 16:09:20 +00:00
helper-a64.h target/arm: Use DEF_HELPER_FLAGS for helper_dc_zva 2020-03-05 16:09:21 +00:00
helper-sve.h target/arm: Convert PMULL.8 to gvec 2020-02-21 16:07:02 +00:00
helper.c target/arm: Drop access_el3_aa32ns_aa64any() 2020-05-11 10:57:42 +01:00
helper.h target/arm: Vectorize integer comparison vs zero 2020-04-30 15:35:41 +01:00
idau.h qom: make interface types abstract 2018-12-11 15:45:22 -02:00
internals.h target/arm: Introduce core_to_aa64_mmu_idx 2020-03-05 16:09:20 +00:00
iwmmxt_helper.c
kvm32.c target/arm: kvm: Inject events at the last stage of sync 2020-03-12 16:31:10 +00:00
kvm64.c target/arm: kvm: Inject events at the last stage of sync 2020-03-12 16:31:10 +00:00
kvm_arm.h target/arm/kvm: Let kvm_arm_vgic_probe() return a bitmap 2020-03-12 16:27:33 +00:00
kvm-consts.h
kvm-stub.c Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
kvm.c target/arm/kvm: Let kvm_arm_vgic_probe() return a bitmap 2020-03-12 16:27:33 +00:00
m_helper.c target/arm: Add isar_feature_aa32_vfp_simd 2020-02-28 16:14:57 +00:00
machine.c target/arm: Add isar_feature_aa64_fp_simd, isar_feature_aa32_vfp 2020-02-28 16:14:57 +00:00
Makefile.objs target/arm: Add stubs for AArch32 Neon decodetree 2020-05-04 12:57:56 +01:00
monitor.c Use &error_abort instead of separate assert() 2020-03-17 16:05:40 +01:00
neon_helper.c target/arm: Vectorize integer comparison vs zero 2020-04-30 15:35:41 +01:00
neon-dp.decode target/arm: Convert Neon 3-reg-same VMUL, VMLA, VMLS, VSHL to decodetree 2020-05-04 12:57:56 +01:00
neon-ls.decode target/arm: Convert Neon 'load/store single structure' to decodetree 2020-05-04 12:57:56 +01:00
neon-shared.decode target/arm: Convert VFM[AS]L (scalar) to decodetree 2020-05-04 12:57:56 +01:00
op_addsub.h
op_helper.c target/arm: Move helper_dc_zva to helper-a64.c 2020-03-05 16:09:20 +00:00
pauth_helper.c target/arm: Use bit 55 explicitly for pauth 2020-02-21 16:07:00 +00:00
psci.c sysemu: Split sysemu/runstate.h off sysemu/sysemu.h 2019-08-16 13:37:36 +02:00
sve_helper.c target/arm: Use SVEContLdSt for contiguous stores 2020-05-11 11:22:06 +01:00
sve.decode target/arm: SVE brk[ab] merging does not have s bit 2019-01-07 15:23:45 +00:00
t16.decode target/arm: Convert T16, long branches 2019-09-05 13:23:04 +01:00
t32.decode target/arm: Convert TT 2019-09-05 13:23:03 +01:00
tlb_helper.c target/arm: Return correct IL bit in merge_syn_data_abort 2020-01-17 14:27:16 +00:00
trace-events trace-events: Shorten file names in comments 2019-03-22 16:18:07 +00:00
translate-a64.c target/arm: Use tcg_gen_gvec_dup_imm 2020-05-06 09:25:03 -07:00
translate-a64.h target/arm: Convert Neon 3-reg-same VADD/VSUB to decodetree 2020-05-04 12:57:56 +01:00
translate-neon.inc.c target/arm: Convert Neon 3-reg-same VMUL, VMLA, VMLS, VSHL to decodetree 2020-05-04 12:57:56 +01:00
translate-sve.c target/arm: Use tcg_gen_gvec_dup_imm 2020-05-06 09:25:03 -07:00
translate-vfp.inc.c target/arm/translate-vfp.inc.c: Remove duplicate simd_r32 check 2020-05-04 12:57:56 +01:00
translate.c target/arm: Use tcg_gen_gvec_dup_imm 2020-05-06 09:25:03 -07:00
translate.h target/arm: Move gen_ function typedefs to translate.h 2020-05-04 12:59:26 +01:00
vec_helper.c target/arm: Vectorize integer comparison vs zero 2020-04-30 15:35:41 +01:00
vfp_helper.c target/arm: Add isar_feature_any_fp16 and document naming/usage conventions 2020-02-21 16:07:00 +00:00
vfp-uncond.decode target/arm: Split VMINMAXNM decode 2020-02-28 16:14:57 +00:00
vfp.decode target/arm: Split VFM decode 2020-02-28 16:14:57 +00:00