7bfdb6d18c
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@13 c046a42c-6fe2-441c-8c8c-71466251a162
104 lines
1.9 KiB
C
104 lines
1.9 KiB
C
/* templates for various register related operations */
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void OPPROTO glue(op_movl_A0,REGNAME)(void)
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{
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A0 = REG;
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}
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void OPPROTO glue(op_addl_A0,REGNAME)(void)
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{
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A0 += REG;
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}
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void OPPROTO glue(glue(op_addl_A0,REGNAME),_s1)(void)
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{
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A0 += REG << 1;
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}
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void OPPROTO glue(glue(op_addl_A0,REGNAME),_s2)(void)
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{
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A0 += REG << 2;
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}
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void OPPROTO glue(glue(op_addl_A0,REGNAME),_s3)(void)
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{
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A0 += REG << 3;
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}
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void OPPROTO glue(op_movl_T0,REGNAME)(void)
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{
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T0 = REG;
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}
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void OPPROTO glue(op_movl_T1,REGNAME)(void)
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{
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T1 = REG;
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}
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void OPPROTO glue(op_movh_T0,REGNAME)(void)
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{
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T0 = REG >> 8;
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}
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void OPPROTO glue(op_movh_T1,REGNAME)(void)
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{
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T1 = REG >> 8;
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}
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void OPPROTO glue(glue(op_movl,REGNAME),_T0)(void)
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{
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REG = T0;
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}
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void OPPROTO glue(glue(op_movl,REGNAME),_T1)(void)
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{
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REG = T1;
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}
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void OPPROTO glue(glue(op_movl,REGNAME),_A0)(void)
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{
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REG = A0;
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}
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/* NOTE: T0 high order bits are ignored */
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void OPPROTO glue(glue(op_movw,REGNAME),_T0)(void)
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{
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REG = (REG & 0xffff0000) | (T0 & 0xffff);
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}
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/* NOTE: T0 high order bits are ignored */
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void OPPROTO glue(glue(op_movw,REGNAME),_T1)(void)
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{
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REG = (REG & 0xffff0000) | (T1 & 0xffff);
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}
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/* NOTE: A0 high order bits are ignored */
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void OPPROTO glue(glue(op_movw,REGNAME),_A0)(void)
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{
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REG = (REG & 0xffff0000) | (A0 & 0xffff);
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}
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/* NOTE: T0 high order bits are ignored */
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void OPPROTO glue(glue(op_movb,REGNAME),_T0)(void)
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{
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REG = (REG & 0xffffff00) | (T0 & 0xff);
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}
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/* NOTE: T0 high order bits are ignored */
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void OPPROTO glue(glue(op_movh,REGNAME),_T0)(void)
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{
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REG = (REG & 0xffff00ff) | ((T0 & 0xff) << 8);
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}
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/* NOTE: T1 high order bits are ignored */
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void OPPROTO glue(glue(op_movb,REGNAME),_T1)(void)
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{
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REG = (REG & 0xffffff00) | (T1 & 0xff);
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}
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/* NOTE: T1 high order bits are ignored */
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void OPPROTO glue(glue(op_movh,REGNAME),_T1)(void)
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{
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REG = (REG & 0xffff00ff) | ((T1 & 0xff) << 8);
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}
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