70e1ee59bb
On PCI init PCI bridges may need some extra info about bus number, IO, memory and prefetchable memory to reserve. QEMU can provide this with a special vendor-specific PCI capability. Signed-off-by: Aleksandr Bezzubikov <zuban32s@gmail.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Tested-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
96 lines
3.8 KiB
C
96 lines
3.8 KiB
C
/*
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* QEMU PCI bridge
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*
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* Copyright (c) 2004 Fabrice Bellard
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* split out pci bus specific stuff from pci.[hc] to pci_bridge.[hc]
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* Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
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* VA Linux Systems Japan K.K.
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*
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*/
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#ifndef QEMU_PCI_BRIDGE_H
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#define QEMU_PCI_BRIDGE_H
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#include "hw/pci/pci.h"
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#define PCI_BRIDGE_DEV_PROP_CHASSIS_NR "chassis_nr"
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#define PCI_BRIDGE_DEV_PROP_MSI "msi"
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#define PCI_BRIDGE_DEV_PROP_SHPC "shpc"
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int pci_bridge_ssvid_init(PCIDevice *dev, uint8_t offset,
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uint16_t svid, uint16_t ssid,
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Error **errp);
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PCIDevice *pci_bridge_get_device(PCIBus *bus);
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PCIBus *pci_bridge_get_sec_bus(PCIBridge *br);
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pcibus_t pci_bridge_get_base(const PCIDevice *bridge, uint8_t type);
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pcibus_t pci_bridge_get_limit(const PCIDevice *bridge, uint8_t type);
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void pci_bridge_update_mappings(PCIBridge *br);
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void pci_bridge_write_config(PCIDevice *d,
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uint32_t address, uint32_t val, int len);
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void pci_bridge_disable_base_limit(PCIDevice *dev);
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void pci_bridge_reset(DeviceState *qdev);
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void pci_bridge_initfn(PCIDevice *pci_dev, const char *typename);
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void pci_bridge_exitfn(PCIDevice *pci_dev);
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/*
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* before qdev initialization(qdev_init()), this function sets bus_name and
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* map_irq callback which are necessry for pci_bridge_initfn() to
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* initialize bus.
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*/
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void pci_bridge_map_irq(PCIBridge *br, const char* bus_name,
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pci_map_irq_fn map_irq);
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/* TODO: add this define to pci_regs.h in linux and then in qemu. */
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#define PCI_BRIDGE_CTL_VGA_16BIT 0x10 /* VGA 16-bit decode */
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#define PCI_BRIDGE_CTL_DISCARD 0x100 /* Primary discard timer */
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#define PCI_BRIDGE_CTL_SEC_DISCARD 0x200 /* Secondary discard timer */
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#define PCI_BRIDGE_CTL_DISCARD_STATUS 0x400 /* Discard timer status */
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#define PCI_BRIDGE_CTL_DISCARD_SERR 0x800 /* Discard timer SERR# enable */
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typedef struct PCIBridgeQemuCap {
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uint8_t id; /* Standard PCI capability header field */
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uint8_t next; /* Standard PCI capability header field */
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uint8_t len; /* Standard PCI vendor-specific capability header field */
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uint8_t type; /* Red Hat vendor-specific capability type.
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Types are defined with REDHAT_PCI_CAP_ prefix */
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uint32_t bus_res; /* Minimum number of buses to reserve */
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uint64_t io; /* IO space to reserve */
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uint32_t mem; /* Non-prefetchable memory to reserve */
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/* At most one of the following two fields may be set to a value
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* different from -1 */
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uint32_t mem_pref_32; /* Prefetchable memory to reserve (32-bit MMIO) */
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uint64_t mem_pref_64; /* Prefetchable memory to reserve (64-bit MMIO) */
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} PCIBridgeQemuCap;
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#define REDHAT_PCI_CAP_RESOURCE_RESERVE 1
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int pci_bridge_qemu_reserve_cap_init(PCIDevice *dev, int cap_offset,
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uint32_t bus_reserve, uint64_t io_reserve,
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uint32_t mem_non_pref_reserve,
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uint32_t mem_pref_32_reserve,
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uint64_t mem_pref_64_reserve,
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Error **errp);
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#endif /* QEMU_PCI_BRIDGE_H */
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