1105812382
The basic SGX did not enable numa for SGX EPC sections, which result in all EPC sections located in numa node 0. This patch enable SGX numa function in the guest and the EPC section can work with RAM as one numa node. The Guest kernel related log: [ 0.009981] ACPI: SRAT: Node 0 PXM 0 [mem 0x180000000-0x183ffffff] [ 0.009982] ACPI: SRAT: Node 1 PXM 1 [mem 0x184000000-0x185bfffff] The SRAT table can normally show SGX EPC sections menory info in different numa nodes. The SGX EPC numa related command: ...... -m 4G,maxmem=20G \ -smp sockets=2,cores=2 \ -cpu host,+sgx-provisionkey \ -object memory-backend-ram,size=2G,host-nodes=0,policy=bind,id=node0 \ -object memory-backend-epc,id=mem0,size=64M,prealloc=on,host-nodes=0,policy=bind \ -numa node,nodeid=0,cpus=0-1,memdev=node0 \ -object memory-backend-ram,size=2G,host-nodes=1,policy=bind,id=node1 \ -object memory-backend-epc,id=mem1,size=28M,prealloc=on,host-nodes=1,policy=bind \ -numa node,nodeid=1,cpus=2-3,memdev=node1 \ -M sgx-epc.0.memdev=mem0,sgx-epc.0.node=0,sgx-epc.1.memdev=mem1,sgx-epc.1.node=1 \ ...... Signed-off-by: Yang Zhong <yang.zhong@intel.com> Message-Id: <20211101162009.62161-2-yang.zhong@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
71 lines
1.8 KiB
C
71 lines
1.8 KiB
C
/*
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* SGX EPC device
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*
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* Copyright (C) 2019 Intel Corporation
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*
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* Authors:
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* Sean Christopherson <sean.j.christopherson@intel.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef QEMU_SGX_EPC_H
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#define QEMU_SGX_EPC_H
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#include "hw/i386/hostmem-epc.h"
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#define TYPE_SGX_EPC "sgx-epc"
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#define SGX_EPC(obj) \
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OBJECT_CHECK(SGXEPCDevice, (obj), TYPE_SGX_EPC)
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#define SGX_EPC_CLASS(oc) \
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OBJECT_CLASS_CHECK(SGXEPCDeviceClass, (oc), TYPE_SGX_EPC)
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#define SGX_EPC_GET_CLASS(obj) \
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OBJECT_GET_CLASS(SGXEPCDeviceClass, (obj), TYPE_SGX_EPC)
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#define SGX_EPC_ADDR_PROP "addr"
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#define SGX_EPC_SIZE_PROP "size"
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#define SGX_EPC_MEMDEV_PROP "memdev"
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#define SGX_EPC_NUMA_NODE_PROP "node"
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/**
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* SGXEPCDevice:
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* @addr: starting guest physical address, where @SGXEPCDevice is mapped.
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* Default value: 0, means that address is auto-allocated.
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* @hostmem: host memory backend providing memory for @SGXEPCDevice
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*/
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typedef struct SGXEPCDevice {
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/* private */
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DeviceState parent_obj;
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/* public */
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uint64_t addr;
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uint32_t node;
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HostMemoryBackendEpc *hostmem;
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} SGXEPCDevice;
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/*
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* @base: address in guest physical address space where EPC regions start
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* @mr: address space container for memory devices
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*/
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typedef struct SGXEPCState {
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uint64_t base;
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uint64_t size;
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MemoryRegion mr;
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struct SGXEPCDevice **sections;
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int nr_sections;
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} SGXEPCState;
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bool sgx_epc_get_section(int section_nr, uint64_t *addr, uint64_t *size);
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void sgx_epc_build_srat(GArray *table_data);
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static inline uint64_t sgx_epc_above_4g_end(SGXEPCState *sgx_epc)
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{
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assert(sgx_epc != NULL && sgx_epc->base >= 0x100000000ULL);
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return sgx_epc->base + sgx_epc->size;
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}
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#endif
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