qemu/target-ppc
j_mayer 0db1b20e47 Synchronize with latest PowerPC ISA VEA:
* fix invalid instructions bits masks
* new wait instruction
* more comments about effect of cache instructions on the MMU


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3287 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-30 03:46:38 +00:00
..
cpu.h XER is to be treated as a 64 bits register on 64 bits implementations, 2007-09-30 00:50:23 +00:00
exec.h Great rework and cleanups to ease PowerPC implementations definitions. 2007-09-26 23:54:22 +00:00
helper.c XER is to be treated as a 64 bits register on 64 bits implementations, 2007-09-30 00:50:23 +00:00
mfrom_table_gen.c find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex. 2007-09-17 08:09:54 +00:00
mfrom_table.c find -type f | xargs sed -i 's/[\t ]$//g' # on most files 2007-09-16 21:08:06 +00:00
op_helper_mem.h More PowerPC target cleanups: 2007-09-19 04:34:09 +00:00
op_helper.c Implement Process Priority Register as defined in the PowerPC 2.04 spec. 2007-09-30 01:18:26 +00:00
op_helper.h Implement Process Priority Register as defined in the PowerPC 2.04 spec. 2007-09-30 01:18:26 +00:00
op_mem.h Improve single-precision floats load & stores: 2007-09-30 01:01:08 +00:00
op_template.h Coding style fixes in PowerPC related code (no functional change): 2007-09-17 08:21:54 +00:00
op.c Implement Process Priority Register as defined in the PowerPC 2.04 spec. 2007-09-30 01:18:26 +00:00
STATUS Great rework and cleanups to ease PowerPC implementations definitions. 2007-09-26 23:54:22 +00:00
translate_init.c Implement the PowerPC alternate time-base, following the 2.04 specification. 2007-09-30 00:38:38 +00:00
translate.c Synchronize with latest PowerPC ISA VEA: 2007-09-30 03:46:38 +00:00