921923583f
This adds a non-cryptographic grade implementation of the model for the True Random Number Generator (TRNG) component in AMD/Xilinx Versal device family. This implements all 3 modes defined by the actual hardware specs, all of which selectable by guest software at will at anytime: 1) PRNG mode, in which the generated sequence is required to be reproducible after reseeded by the same 384-bit value as supplied by guest software. 2) Test mode, in which the generated sequence is required to be reproducible ater reseeded by the same 128-bit test seed supplied by guest software. 3) TRNG mode, in which non-reproducible sequence is generated based on periodic reseed by a suitable entropy source. This model is only intended for non-real world testing of guest software, where cryptographically strong PRNG or TRNG is not needed. This model supports versions 1 & 2 of the device, with default to be version 2; the 'hw-version' uint32 property can be set to 0x0100 to override the default. Other implemented properties: - 'forced-prng', uint64 When set to non-zero, mode 3's entropy source is implemented as a deterministic sequence based on the given value and other deterministic parameters. This option allows the emulation to test guest software using mode 3 and to reproduce data-dependent defects. - 'fips-fault-events', uint32, bit-mask bit 3: Triggers the SP800-90B entropy health test fault irq bit 1: Triggers the FIPS 140-2 continuous test fault irq Signed-off-by: Tong Ho <tong.ho@amd.com> Message-id: 20231031184611.3029156-2-tong.ho@amd.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
59 lines
2.0 KiB
C
59 lines
2.0 KiB
C
/*
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* Non-crypto strength model of the True Random Number Generator
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* in the AMD/Xilinx Versal device family.
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*
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* Copyright (c) 2017-2020 Xilinx Inc.
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* Copyright (c) 2023 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef XLNX_VERSAL_TRNG_H
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#define XLNX_VERSAL_TRNG_H
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#include "hw/irq.h"
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#include "hw/sysbus.h"
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#include "hw/register.h"
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#define TYPE_XLNX_VERSAL_TRNG "xlnx.versal-trng"
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OBJECT_DECLARE_SIMPLE_TYPE(XlnxVersalTRng, XLNX_VERSAL_TRNG);
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#define RMAX_XLNX_VERSAL_TRNG ((0xf0 / 4) + 1)
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typedef struct XlnxVersalTRng {
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SysBusDevice parent_obj;
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qemu_irq irq;
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GRand *prng;
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uint32_t hw_version;
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uint32_t forced_faults;
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uint32_t rand_count;
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uint64_t rand_reseed;
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uint64_t forced_prng_seed;
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uint64_t forced_prng_count;
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uint64_t tst_seed[2];
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uint32_t regs[RMAX_XLNX_VERSAL_TRNG];
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RegisterInfo regs_info[RMAX_XLNX_VERSAL_TRNG];
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} XlnxVersalTRng;
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#undef RMAX_XLNX_VERSAL_TRNG
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#endif
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