qemu/target
Sven Schnelle 0b49c33988 target/hppa: fix TLB handling for page 0
Assume the following sequence:

pitlbe r0(sr0,r0)
iitlba r4,(sr0,r0)
ldil L%3000000,r5
iitlbp r5,(sr0,r0)

This will purge the whole TLB and add an entry for page 0. However
the current TLB implementation in helper_iitlba() will store to
the last empty TLB entry, while helper_iitlbp() will write to the
first empty entry. That is because an empty entry will match address
0 in helper_iitlba()

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Message-Id: <20190311191602.25796-3-svens@stackframe.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-03-12 09:13:43 -07:00
..
alpha avoid TABs in files that only contain a few 2019-01-11 15:46:56 +01:00
arm kvm: add kvm_arm_get_max_vm_ipa_size 2019-03-05 15:55:09 +00:00
cris avoid TABs in files that only contain a few 2019-01-11 15:46:56 +01:00
hppa target/hppa: fix TLB handling for page 0 2019-03-12 09:13:43 -07:00
i386 i386: extended the cpuid_level when Intel PT is enabled 2019-03-11 16:33:49 +01:00
lm32 tcg-next queue 2018-06-04 11:28:31 +01:00
m68k target/m68k: Fix LGPL information in the file headers 2019-01-30 14:20:13 +01:00
microblaze target/microblaze: Add props enabling exceptions on failed bus accesses 2019-01-22 03:17:34 -08:00
mips target/mips: Preparing for adding MMI instructions 2019-02-27 14:26:14 +01:00
moxie target/moxie: Fix LGPL information in the file headers 2019-02-06 15:46:11 +01:00
nios2 tcg-next queue 2018-06-04 11:28:31 +01:00
openrisc target/openrisc: Fix LGPL version number 2019-01-30 11:01:36 +01:00
ppc spapr: Use CamelCase properly 2019-03-12 14:33:05 +11:00
riscv target/riscv: fix counter-enable checks in ctr() 2019-02-11 15:56:22 -08:00
s390x s390x/tcg: Implement VECTOR UNPACK * 2019-03-11 09:31:01 +01:00
sh4 sh4: fix use_icount with linux-user 2018-08-20 00:11:06 +02:00
sparc qdev-props: remove errp from GlobalProperty 2019-01-07 16:18:42 +04:00
tilegx avoid TABs in files that only contain a few 2019-01-11 15:46:56 +01:00
tricore tricore: fixed RCR_CADDN instruction 2019-03-08 10:00:59 +01:00
unicore32 target/unicore32: remove tlb_flush from uc32_init_fn 2018-10-18 18:58:10 -07:00
xtensa target/xtensa: implement PREFCTL SR 2019-02-28 04:43:22 -08:00