Peter Maydell 0b45451e58 target-arm: Implement AArch64 dummy breakpoint and watchpoint registers ...

In AArch64 the breakpoint and watchpoint registers are mandatory, so the
kernel always accesses them on bootup. Implement dummy versions, which
read as written but have no actual effect.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>

2014-02-26 17:20:05 +00:00

..

arm-semi.c

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cpu64.c

target-arm: A64: Make cache ID registers visible to AArch64

2014-02-26 17:20:01 +00:00

cpu-qom.h

target-arm: Implement AArch64 ID and feature registers

2014-02-26 17:20:05 +00:00

cpu.c

target-arm: Implement AArch64 cache invalidate/clean ops

2014-02-26 17:20:02 +00:00

cpu.h

target-arm: Implement AArch64 dummy breakpoint and watchpoint registers

2014-02-26 17:20:05 +00:00

crypto_helper.c

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gdbstub64.c

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gdbstub.c

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helper-a64.c

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helper-a64.h

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helper.c

target-arm: Implement AArch64 dummy breakpoint and watchpoint registers

2014-02-26 17:20:05 +00:00

helper.h

target-arm: Split cpreg access checks out from read/write functions

2014-02-20 10:35:52 +00:00

iwmmxt_helper.c

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kvm32.c

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kvm64.c

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kvm_arm.h

arm: vgic device control api support

2014-02-26 17:20:00 +00:00

kvm-consts.h

target-arm/kvm-consts.h: Define QEMU constants for known KVM CPUs

2014-02-20 10:35:50 +00:00

kvm-stub.c

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kvm.c

arm: vgic device control api support

2014-02-26 17:20:00 +00:00

machine.c

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Makefile.objs

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neon_helper.c

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op_addsub.h

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op_helper.c

target-arm: Drop success/fail return from cpreg read and write functions

2014-02-20 10:35:54 +00:00

translate-a64.c

target-arm: Implement AArch64 CurrentEL sysreg

2014-02-26 17:20:02 +00:00

translate.c

target-arm: Remove unnecessary code now read/write fns can't fail

2014-02-20 10:35:54 +00:00

translate.h

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