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0a9a6cba8b
qemu/hw/intc
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Frédéric Pétrot 0a9a6cba8b hw/intc: sifive_plic: Renumber the S irqs for numa support 
Commit 40244040a7 changed the way the S irqs are numbered. This breaks when
using numa configuration, e.g.:
./qemu-system-riscv64 -nographic -machine virt,dumpdtb=numa-tree.dtb \
                      -m 2G -smp cpus=16 \
		      -object memory-backend-ram,id=mem0,size=512M \
		      -object memory-backend-ram,id=mem1,size=512M \
		      -object memory-backend-ram,id=mem2,size=512M \
		      -object memory-backend-ram,id=mem3,size=512M \
		      -numa node,cpus=0-3,memdev=mem0,nodeid=0 \
		      -numa node,cpus=4-7,memdev=mem1,nodeid=1 \
		      -numa node,cpus=8-11,memdev=mem2,nodeid=2 \
		      -numa node,cpus=12-15,memdev=mem3,nodeid=3
leads to:
Unexpected error in object_property_find_err() at ../qom/object.c:1304:
qemu-system-riscv64: Property 'riscv.sifive.plic.unnamed-gpio-out[8]' not
found

This patch makes the nubering of the S irqs identical to what it was before.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr>
Message-Id: <20221114135122.1668703-1-frederic.petrot@univ-grenoble-alpes.fr>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-01-06 10:42:55 +10:00
..
allwinner-a10-pic.c
apic_common.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
apic.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
arm_gic_common.c hw/intc: Convert TYPE_ARM_GIC_COMMON to 3-phase reset 2022-12-15 11:18:20 +00:00
arm_gic_kvm.c hw/intc: Convert TYPE_ARM_GIC_KVM to 3-phase reset 2022-12-15 11:18:20 +00:00
arm_gic.c hw/intc: add implementation of GICD_IIDR to Arm GIC 2022-11-21 11:45:13 +00:00
arm_gicv2m.c
arm_gicv3_common.c hw/intc: Convert TYPE_ARM_GICV3_COMMON to 3-phase reset 2022-12-15 11:18:20 +00:00
arm_gicv3_cpuif_common.c hw/intc/arm_gicv3: Extract gicv3_set_gicv3state from arm_gicv3_cpuif.c 2021-12-15 10:11:34 +00:00
arm_gicv3_cpuif.c hw/intc/arm_gicv3: fix prio masking on pmr write 2022-11-14 15:10:58 +00:00
arm_gicv3_dist.c hw/intc/arm_gicv3: Fix GICD_TYPER ITLinesNumber advertisement 2022-12-15 11:18:19 +00:00
arm_gicv3_its_common.c hw/intc: Convert TYPE_ARM_GICV3_ITS_COMMON to 3-phase reset 2022-12-15 11:18:20 +00:00
arm_gicv3_its_kvm.c hw/intc: Convert TYPE_KVM_ARM_ITS to 3-phase reset 2022-12-15 11:18:20 +00:00
arm_gicv3_its.c hw/intc: Convert TYPE_ARM_GICV3_ITS to 3-phase reset 2022-12-15 11:18:20 +00:00
arm_gicv3_kvm.c hw/intc: Convert TYPE_KVM_ARM_GICV3 to 3-phase reset 2022-12-15 11:18:20 +00:00
arm_gicv3_redist.c misc: fix commonly doubled up words 2022-08-01 11:58:02 +02:00
arm_gicv3.c hw/intc/arm_gicv3: Specify valid and impl in MemoryRegionOps 2022-03-07 13:16:50 +00:00
armv7m_nvic.c hw/intc/armv7m_nvic: ICPRn must not unpend an IRQ that is being held high 2022-07-18 13:20:09 +01:00
aspeed_vic.c
bcm2835_ic.c Mark remaining global TypeInfo instances as const 2022-02-21 13:30:20 +00:00
bcm2836_control.c Mark remaining global TypeInfo instances as const 2022-02-21 13:30:20 +00:00
etraxfs_pic.c
exynos4210_combiner.c hw/arm/exynos4210: Put combiners into state struct 2022-04-21 11:37:04 +01:00
exynos4210_gic.c Misc cleanups 2022-04-21 09:27:54 -07:00
gic_internal.h
gicv3_internal.h hw/intc/arm_gicv3: Update ID and feature registers for GICv4 2022-04-22 14:44:53 +01:00
goldfish_pic.c hw/m68k: Fix typo in SPDX tag 2021-11-09 10:11:27 +01:00
grlib_irqmp.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
heathrow_pic.c hw/ppc/mac.h: Rename to include/hw/nvram/mac_nvram.h 2022-10-31 18:48:23 +00:00
i8259_common.c intc: Unexport InterruptStatsProviderClass-related functions 2022-01-27 12:08:50 +01:00
i8259.c
imx_avic.c
imx_gpcv2.c hw: Do not include qemu/log.h if it is not necessary 2021-05-02 17:24:50 +02:00
intc.c
ioapic_common.c intc: Unexport InterruptStatsProviderClass-related functions 2022-01-27 12:08:50 +01:00
ioapic.c
Kconfig hw/intc: Add LoongArch extioi interrupt controller(EIOINTC) 2022-06-06 18:12:30 +00:00
loongarch_extioi.c hw/intc: Fix LoongArch extioi coreisr accessing 2022-11-04 17:07:40 +08:00
loongarch_ipi.c hw/intc: Fix LoongArch ipi device emulation 2022-10-17 10:28:35 +08:00
loongarch_pch_msi.c hw/intc/loongarch_pch_msi: Fix msi vector convertion 2022-07-04 11:08:58 +05:30
loongarch_pch_pic.c hw/intc/loongarch_pch_pic: Fix bugs for update_irq function 2022-07-19 21:53:58 +05:30
loongson_liointc.c
m68k_irqc.c hw/m68k: Fix typo in SPDX tag 2021-11-09 10:11:27 +01:00
meson.build hw/intc: Add LoongArch extioi interrupt controller(EIOINTC) 2022-06-06 18:12:30 +00:00
mips_gic.c
nios2_vic.c hw/intc: Vectored Interrupt Controller (VIC) 2022-04-26 08:17:05 -07:00
omap_intc.c
ompic.c hw: Do not include qemu/log.h if it is not necessary 2021-05-02 17:24:50 +02:00
openpic_kvm.c memory: Name all the memory listeners 2021-09-30 15:30:24 +02:00
openpic.c hw/ppc/mac.h: Rename to include/hw/nvram/mac_nvram.h 2022-10-31 18:48:23 +00:00
pl190.c
pnv_xive2_regs.h pnv/xive2: Add support for automatic save&restore 2022-03-02 06:51:39 +01:00
pnv_xive2.c ppc: Define SETFIELD for the ppc target 2022-07-06 10:22:38 -03:00
pnv_xive_regs.h
pnv_xive.c ppc: Define SETFIELD for the ppc target 2022-07-06 10:22:38 -03:00
ppc-uic.c hw/intc/ppc-uic: Convert ppc-uic to a PPC4xx DCR device 2022-08-31 14:08:06 -03:00
realview_gic.c
riscv_aclint.c hw/intc: Move mtimer/mtimecmp to aclint 2022-09-07 09:19:10 +02:00
riscv_aplic.c Fix 'writeable' typos 2022-06-08 19:38:47 +01:00
riscv_imsic.c target/riscv: Use official extension names for AIA CSRs 2022-09-07 09:18:33 +02:00
rx_icu.c
s390_flic_kvm.c Replace qemu_real_host_page variables with inlined functions 2022-04-06 10:50:38 +02:00
s390_flic.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
sh_intc.c hw/intc/sh_intc: Remove unneeded local variable initialisers 2021-10-30 18:39:37 +02:00
sifive_plic.c hw/intc: sifive_plic: Renumber the S irqs for numa support 2023-01-06 10:42:55 +10:00
slavio_intctl.c
spapr_xive_kvm.c spapr/xive: Use xive_esb_rw() to trigger interrupts 2021-10-21 11:42:47 +11:00
spapr_xive.c ppc/xive: Add support for PQ state bits offload 2022-03-02 06:51:39 +01:00
trace-events hw/intc: Convert the memops to with_attrs in LoongArch extioi 2022-11-04 17:07:37 +08:00
trace.h
vgic_common.h
xics_kvm.c Remove qemu-common.h include from most units 2022-04-06 14:31:55 +02:00
xics_pnv.c
xics_spapr.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
xics.c hw/intc/xics: Convert TYPE_ICS to 3-phase reset 2022-12-16 15:59:07 +00:00
xilinx_intc.c
xive2.c ppc/xive: Update the state of the External interrupt signal 2022-05-05 15:36:17 -03:00
xive.c ppc64: Allocate IRQ lines with qdev_init_gpio_in() 2022-07-18 13:59:43 -03:00
xlnx-pmu-iomod-intc.c
xlnx-zynqmp-ipi.c