
MMCR0, MMCR1, MMCRA, PMC1..6, SIAR, SDAR are defined for 970 and PowerISA CPUs. Since we are building common infrastructure for SPRs intialization to share it between 970 and POWER5+/7/..., let's add missing SPRs to the 970 family. Later rework of CPU class initialization will use those for all PowerISA CPUs. This adds new SPRs and enables writing to Uxxxx SPRs from supermode. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
…
…
…
…
…
…
…
…
…
…
…
…
…
Read the documentation in qemu-doc.html or on http://wiki.qemu-project.org - QEMU team
Description
Languages
C
82.6%
C++
6.5%
Python
3.4%
Dylan
2.9%
Shell
1.6%
Other
2.8%