qemu/target
Peter Maydell c8d2fc2177 target/arm: Don't skip MTE checks for LDRT/STRT at EL0
The LDRT/STRT "unprivileged load/store" instructions behave like
normal ones if executed at EL0. We handle this correctly for
the load/store semantics, but get the MTE checking wrong.

We always look at s->mte_active[is_unpriv] to see whether we should
be doing MTE checks, but in hflags.c when we set the TB flags that
will be used to fill the mte_active[] array we only set the
MTE0_ACTIVE bit if UNPRIV is true (i.e.  we are not at EL0).

This means that a LDRT at EL0 will see s->mte_active[1] as 0,
and will not do MTE checks even when MTE is enabled.

To avoid the translate-time code having to do an explicit check on
s->unpriv to see if it is OK to index into the mte_active[] array,
duplicate MTE_ACTIVE into MTE0_ACTIVE when UNPRIV is false.

(This isn't a very serious bug because generally nobody executes
LDRT/STRT at EL0, because they have no use there.)

Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230912140434.1333369-2-peter.maydell@linaro.org
(cherry picked from commit 903dbefc2b)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
(Mjt: before v7.2.0-1636-g671efad16a this code was in target/arm/helper.c)
2023-09-25 23:43:49 +03:00
..
alpha accel/tcg: Remove will_exit argument from cpu_restore_state 2022-11-01 08:31:41 +11:00
arm target/arm: Don't skip MTE checks for LDRT/STRT at EL0 2023-09-25 23:43:49 +03:00
avr target/avr: Convert to tcg_ops restore_state_to_opc 2022-10-26 11:11:28 +10:00
cris accel/tcg: Remove will_exit argument from cpu_restore_state 2022-11-01 08:31:41 +11:00
hexagon target/hexagon: Convert to tcg_ops restore_state_to_opc 2022-10-26 11:11:28 +10:00
hppa target/hppa: Move iaoq registers and thus reduce generated code size 2023-08-04 07:33:49 +03:00
i386 kvm: Introduce kvm_arch_get_default_type hook 2023-09-11 10:53:50 +03:00
loongarch target/loongarch: Fix the CSRRD CPUID instruction on big endian hosts 2023-07-31 09:12:06 +03:00
m68k target/m68k: Fix semihost lseek offset computation 2023-08-03 08:26:26 +03:00
microblaze accel/tcg: Remove will_exit argument from cpu_restore_state 2022-11-01 08:31:41 +11:00
mips kvm: Introduce kvm_arch_get_default_type hook 2023-09-11 10:53:50 +03:00
nios2 target/nios2: Fix semihost lseek offset computation 2023-08-03 08:26:26 +03:00
openrisc accel/tcg: Remove will_exit argument from cpu_restore_state 2022-11-01 08:31:41 +11:00
ppc target/ppc: Flush inputs to zero with NJ in ppc_store_vscr 2023-09-11 10:53:50 +03:00
riscv target/riscv/pmp.c: respect mseccfg.RLB for pmpaddrX changes 2023-09-13 12:21:22 +03:00
rx Revert incorrect cflags initialization. 2022-10-26 10:53:41 -04:00
s390x kvm: Introduce kvm_arch_get_default_type hook 2023-09-11 10:53:50 +03:00
sh4 target/sh4: Mask restore of env->flags from tb->flags 2023-03-29 10:20:04 +03:00
sparc target/sparc: Convert to tcg_ops restore_state_to_opc 2022-10-26 11:11:28 +10:00
tricore target/tricore: Rename csfr.def -> csfr.h.inc 2022-11-05 20:35:45 +01:00
xtensa accel/tcg: Remove will_exit argument from cpu_restore_state 2022-11-01 08:31:41 +11:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
meson.build target/loongarch: Add target build suport 2022-06-06 18:09:03 +00:00