qemu/target/openrisc
Philippe Mathieu-Daudé 8301ea444a qom/cpu: move cpu_model null check to cpu_class_by_name()
and clean every implementation.

Suggested-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20170917232842.14544-1-f4bug@amsat.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-10-09 23:21:52 -03:00
..
cpu.c qom/cpu: move cpu_model null check to cpu_class_by_name() 2017-10-09 23:21:52 -03:00
cpu.h openrisc: replace cpu_openrisc_init() with cpu_generic_init() 2017-09-01 11:54:25 -03:00
exception_helper.c target/openrisc: Optimize for r0 being zero 2017-02-14 08:15:00 +11:00
exception.c
exception.h
fpu_helper.c target/openrisc: Fix madd 2017-02-14 08:15:00 +11:00
gdbstub.c target/openrisc: implement shadow registers 2017-05-04 09:39:01 +09:00
helper.h target/openrisc: Fix madd 2017-02-14 08:15:00 +11:00
interrupt_helper.c target/openrisc: Tidy ppc/npc implementation 2017-02-14 08:15:00 +11:00
interrupt.c target/openrisc: Support non-busy idle state using PMR SPR 2017-05-04 09:39:14 +09:00
machine.c target/openrisc: Support non-busy idle state using PMR SPR 2017-05-04 09:39:14 +09:00
Makefile.objs target/openrisc: Streamline arithmetic and OVE 2017-02-14 08:14:59 +11:00
mmu_helper.c
mmu.c target/openrisc: Fixes for memory debugging 2017-05-04 09:38:49 +09:00
sys_helper.c target/openrisc: Support non-busy idle state using PMR SPR 2017-05-04 09:39:14 +09:00
translate.c target: [tcg] Use a generic enum for DISAS_ values 2017-09-06 08:06:47 -07:00