60322b399d
The cpregs APIs used by the decoder (get_arm_cp_reginfo() and cp_access_ok()) currently take either a CPUARMState* or an ARMCPU*. This is problematic for the A64 decoder, which doesn't pass the environment pointer around everywhere the way the 32 bit decoder does. Adjust the parameters these functions take so that we can copy only the relevant info from the CPUARMState into the DisasContext and then use that. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
73 lines
1.9 KiB
C
73 lines
1.9 KiB
C
#ifndef TARGET_ARM_TRANSLATE_H
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#define TARGET_ARM_TRANSLATE_H
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/* internal defines */
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typedef struct DisasContext {
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target_ulong pc;
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uint32_t insn;
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int is_jmp;
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/* Nonzero if this instruction has been conditionally skipped. */
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int condjmp;
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/* The label that will be jumped to when the instruction is skipped. */
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int condlabel;
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/* Thumb-2 conditional execution bits. */
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int condexec_mask;
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int condexec_cond;
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struct TranslationBlock *tb;
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int singlestep_enabled;
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int thumb;
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int bswap_code;
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#if !defined(CONFIG_USER_ONLY)
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int user;
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#endif
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int vfp_enabled;
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int vec_len;
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int vec_stride;
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int aarch64;
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int current_pl;
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GHashTable *cp_regs;
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#define TMP_A64_MAX 16
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int tmp_a64_count;
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TCGv_i64 tmp_a64[TMP_A64_MAX];
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} DisasContext;
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extern TCGv_ptr cpu_env;
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/* target-specific extra values for is_jmp */
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/* These instructions trap after executing, so the A32/T32 decoder must
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* defer them until after the conditional execution state has been updated.
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* WFI also needs special handling when single-stepping.
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*/
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#define DISAS_WFI 4
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#define DISAS_SWI 5
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/* For instructions which unconditionally cause an exception we can skip
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* emitting unreachable code at the end of the TB in the A64 decoder
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*/
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#define DISAS_EXC 6
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#ifdef TARGET_AARCH64
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void a64_translate_init(void);
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void gen_intermediate_code_internal_a64(ARMCPU *cpu,
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TranslationBlock *tb,
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bool search_pc);
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void gen_a64_set_pc_im(uint64_t val);
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#else
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static inline void a64_translate_init(void)
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{
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}
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static inline void gen_intermediate_code_internal_a64(ARMCPU *cpu,
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TranslationBlock *tb,
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bool search_pc)
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{
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}
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static inline void gen_a64_set_pc_im(uint64_t val)
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{
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}
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#endif
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void arm_gen_test_cc(int cc, int label);
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#endif /* TARGET_ARM_TRANSLATE_H */
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