b14df228d7
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
16 lines
420 B
ReStructuredText
16 lines
420 B
ReStructuredText
CPU Features
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============
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The QEMU emulation of the OpenRISC architecture provides following built in
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features.
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- Shadow GPRs
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- MMU TLB with 128 entries, 1 way
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- Power Management (PM)
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- Programmable Interrupt Controller (PIC)
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- Tick Timer
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These features are on by default and the presence can be confirmed by checking
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the contents of the Unit Presence Register (``UPR``) and CPU Configuration
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Register (``CPUCFGR``).
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