e92dd33224
accel/tcg/ files requires the following definitions: - TARGET_LONG_BITS - TARGET_PAGE_BITS - TARGET_PHYS_ADDR_SPACE_BITS - TCG_GUEST_DEFAULT_MO The first 3 are defined in "cpu-param.h". The last one in "cpu.h", with a bunch of definitions irrelevant for TCG. By moving the TCG_GUEST_DEFAULT_MO definition to "cpu-param.h", we can simplify various accel/tcg includes. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Nicholas Piggin <npiggin@gmail.com> Message-Id: <20231211212003.21686-4-philmd@linaro.org>
36 lines
894 B
C
36 lines
894 B
C
/*
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* MicroBlaze cpu parameters for qemu.
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*
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* Copyright (c) 2009 Edgar E. Iglesias
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* SPDX-License-Identifier: LGPL-2.0+
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*/
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#ifndef MICROBLAZE_CPU_PARAM_H
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#define MICROBLAZE_CPU_PARAM_H
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/*
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* While system mode can address up to 64 bits of address space,
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* this is done via the lea/sea instructions, which are system-only
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* (as they also bypass the mmu).
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*
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* We can improve the user-only experience by only exposing 32 bits
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* of address space.
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*/
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#ifdef CONFIG_USER_ONLY
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#define TARGET_LONG_BITS 32
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#define TARGET_PHYS_ADDR_SPACE_BITS 32
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#define TARGET_VIRT_ADDR_SPACE_BITS 32
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#else
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#define TARGET_LONG_BITS 64
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#define TARGET_PHYS_ADDR_SPACE_BITS 64
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#define TARGET_VIRT_ADDR_SPACE_BITS 64
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#endif
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/* FIXME: MB uses variable pages down to 1K but linux only uses 4k. */
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#define TARGET_PAGE_BITS 12
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/* MicroBlaze is always in-order. */
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#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL
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#endif
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