Mark Corbin 4c492b4063 bsd-user: Implement set_mcontext and get_ucontext_sigreturn for RISCV ... Added implementations for 'set_mcontext' and 'get_ucontext_sigreturn' functions for RISC-V architecture, Both functions ensure that the CPU state and user context are properly managed. Signed-off-by: Mark Corbin <mark@dibsco.co.uk> Signed-off-by: Warner Losh <imp@bsdimp.com> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Co-authored-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240916155119.14610-17-itachis@FreeBSD.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2024-10-02 15:11:52 +10:00
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signal.c	bsd-user: Implement set_mcontext and get_ucontext_sigreturn for RISCV	2024-10-02 15:11:52 +10:00
target_arch_cpu.c	bsd-user: Implement RISC-V TLS register setup	2024-10-02 15:11:52 +10:00
target_arch_cpu.h	bsd-user: Implement RISC-V CPU register cloning and reset functions	2024-10-02 15:11:52 +10:00
target_arch_elf.h	bsd-user: Add RISC-V ELF definitions and hardware capability detection	2024-10-02 15:11:52 +10:00
target_arch_reg.h	bsd-user: Define RISC-V register structures and register copying	2024-10-02 15:11:52 +10:00
target_arch_signal.h	bsd-user: Define RISC-V signal handling structures and constants	2024-10-02 15:11:52 +10:00
target_arch_sigtramp.h	bsd-user: Add RISC-V signal trampoline setup function	2024-10-02 15:11:52 +10:00
target_arch_sysarch.h	bsd-user: Implement RISC-V sysarch system call emulation	2024-10-02 15:11:52 +10:00
target_arch_thread.h	bsd-user: Add RISC-V thread setup and initialization support	2024-10-02 15:11:52 +10:00
target_arch_vmparam.h	bsd-user: Define RISC-V VM parameters and helper functions	2024-10-02 15:11:52 +10:00
target_arch.h	bsd-user: Implement RISC-V TLS register setup	2024-10-02 15:11:52 +10:00
target_syscall.h	bsd-user: Define RISC-V system call structures and constants	2024-10-02 15:11:52 +10:00
target.h	bsd-user: Add generic RISC-V64 target definitions	2024-10-02 15:11:52 +10:00