6b39bad02e
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20180528232719.4721-16-f4bug@amsat.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
93 lines
2.2 KiB
C
93 lines
2.2 KiB
C
#ifndef HW_NVME_H
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#define HW_NVME_H
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#include "block/nvme.h"
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typedef struct NvmeAsyncEvent {
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QSIMPLEQ_ENTRY(NvmeAsyncEvent) entry;
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NvmeAerResult result;
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} NvmeAsyncEvent;
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typedef struct NvmeRequest {
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struct NvmeSQueue *sq;
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BlockAIOCB *aiocb;
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uint16_t status;
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bool has_sg;
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NvmeCqe cqe;
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BlockAcctCookie acct;
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QEMUSGList qsg;
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QEMUIOVector iov;
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QTAILQ_ENTRY(NvmeRequest)entry;
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} NvmeRequest;
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typedef struct NvmeSQueue {
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struct NvmeCtrl *ctrl;
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uint16_t sqid;
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uint16_t cqid;
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uint32_t head;
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uint32_t tail;
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uint32_t size;
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uint64_t dma_addr;
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QEMUTimer *timer;
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NvmeRequest *io_req;
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QTAILQ_HEAD(sq_req_list, NvmeRequest) req_list;
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QTAILQ_HEAD(out_req_list, NvmeRequest) out_req_list;
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QTAILQ_ENTRY(NvmeSQueue) entry;
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} NvmeSQueue;
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typedef struct NvmeCQueue {
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struct NvmeCtrl *ctrl;
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uint8_t phase;
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uint16_t cqid;
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uint16_t irq_enabled;
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uint32_t head;
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uint32_t tail;
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uint32_t vector;
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uint32_t size;
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uint64_t dma_addr;
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QEMUTimer *timer;
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QTAILQ_HEAD(sq_list, NvmeSQueue) sq_list;
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QTAILQ_HEAD(cq_req_list, NvmeRequest) req_list;
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} NvmeCQueue;
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typedef struct NvmeNamespace {
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NvmeIdNs id_ns;
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} NvmeNamespace;
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#define TYPE_NVME "nvme"
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#define NVME(obj) \
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OBJECT_CHECK(NvmeCtrl, (obj), TYPE_NVME)
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typedef struct NvmeCtrl {
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PCIDevice parent_obj;
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MemoryRegion iomem;
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MemoryRegion ctrl_mem;
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NvmeBar bar;
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BlockConf conf;
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uint32_t page_size;
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uint16_t page_bits;
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uint16_t max_prp_ents;
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uint16_t cqe_size;
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uint16_t sqe_size;
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uint32_t reg_size;
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uint32_t num_namespaces;
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uint32_t num_queues;
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uint32_t max_q_ents;
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uint64_t ns_size;
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uint32_t cmb_size_mb;
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uint32_t cmbsz;
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uint32_t cmbloc;
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uint8_t *cmbuf;
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uint64_t irq_status;
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char *serial;
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NvmeNamespace *namespaces;
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NvmeSQueue **sq;
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NvmeCQueue **cq;
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NvmeSQueue admin_sq;
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NvmeCQueue admin_cq;
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NvmeIdCtrl id_ctrl;
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} NvmeCtrl;
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#endif /* HW_NVME_H */
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