033af8e9aa
Remove the hardcoded values from the machine specific reset function, as the same values are already set in the standard MicroBlaze reset. This also allows the entire reset function to be deleted, as PVR registers are now preserved on reset. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
140 lines
5.1 KiB
C
140 lines
5.1 KiB
C
/*
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* Model of Petalogix linux reference design targeting Xilinx Spartan 3ADSP-1800
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* boards.
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*
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* Copyright (c) 2009 Edgar E. Iglesias.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "hw/sysbus.h"
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#include "hw/hw.h"
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#include "net/net.h"
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#include "hw/block/flash.h"
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#include "sysemu/sysemu.h"
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#include "hw/devices.h"
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#include "hw/boards.h"
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#include "sysemu/block-backend.h"
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#include "exec/address-spaces.h"
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#include "boot.h"
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#define LMB_BRAM_SIZE (128 * 1024)
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#define FLASH_SIZE (16 * 1024 * 1024)
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#define BINARY_DEVICE_TREE_FILE "petalogix-s3adsp1800.dtb"
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#define MEMORY_BASEADDR 0x90000000
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#define FLASH_BASEADDR 0xa0000000
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#define INTC_BASEADDR 0x81800000
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#define TIMER_BASEADDR 0x83c00000
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#define UARTLITE_BASEADDR 0x84000000
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#define ETHLITE_BASEADDR 0x81000000
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#define TIMER_IRQ 0
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#define ETHLITE_IRQ 1
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#define UARTLITE_IRQ 3
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static void
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petalogix_s3adsp1800_init(MachineState *machine)
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{
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ram_addr_t ram_size = machine->ram_size;
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DeviceState *dev;
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MicroBlazeCPU *cpu;
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DriveInfo *dinfo;
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int i;
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hwaddr ddr_base = MEMORY_BASEADDR;
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MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1);
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MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
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qemu_irq irq[32];
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MemoryRegion *sysmem = get_system_memory();
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cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU));
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object_property_set_bool(OBJECT(cpu), true, "realized", &error_abort);
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/* Attach emulated BRAM through the LMB. */
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memory_region_init_ram(phys_lmb_bram, NULL,
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"petalogix_s3adsp1800.lmb_bram", LMB_BRAM_SIZE,
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&error_abort);
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vmstate_register_ram_global(phys_lmb_bram);
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memory_region_add_subregion(sysmem, 0x00000000, phys_lmb_bram);
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memory_region_init_ram(phys_ram, NULL, "petalogix_s3adsp1800.ram",
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ram_size, &error_abort);
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vmstate_register_ram_global(phys_ram);
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memory_region_add_subregion(sysmem, ddr_base, phys_ram);
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dinfo = drive_get(IF_PFLASH, 0, 0);
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pflash_cfi01_register(FLASH_BASEADDR,
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NULL, "petalogix_s3adsp1800.flash", FLASH_SIZE,
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dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
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(64 * 1024), FLASH_SIZE >> 16,
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1, 0x89, 0x18, 0x0000, 0x0, 1);
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dev = qdev_create(NULL, "xlnx.xps-intc");
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qdev_prop_set_uint32(dev, "kind-of-intr",
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1 << ETHLITE_IRQ | 1 << UARTLITE_IRQ);
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qdev_init_nofail(dev);
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sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR);
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sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
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qdev_get_gpio_in(DEVICE(cpu), MB_CPU_IRQ));
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for (i = 0; i < 32; i++) {
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irq[i] = qdev_get_gpio_in(dev, i);
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}
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sysbus_create_simple("xlnx.xps-uartlite", UARTLITE_BASEADDR,
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irq[UARTLITE_IRQ]);
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/* 2 timers at irq 2 @ 62 Mhz. */
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dev = qdev_create(NULL, "xlnx.xps-timer");
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qdev_prop_set_uint32(dev, "one-timer-only", 0);
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qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000);
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qdev_init_nofail(dev);
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sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR);
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sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]);
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qemu_check_nic_model(&nd_table[0], "xlnx.xps-ethernetlite");
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dev = qdev_create(NULL, "xlnx.xps-ethernetlite");
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qdev_set_nic_properties(dev, &nd_table[0]);
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qdev_prop_set_uint32(dev, "tx-ping-pong", 0);
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qdev_prop_set_uint32(dev, "rx-ping-pong", 0);
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qdev_init_nofail(dev);
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sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, ETHLITE_BASEADDR);
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sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[ETHLITE_IRQ]);
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microblaze_load_kernel(cpu, ddr_base, ram_size,
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machine->initrd_filename,
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BINARY_DEVICE_TREE_FILE,
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NULL);
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}
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static QEMUMachine petalogix_s3adsp1800_machine = {
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.name = "petalogix-s3adsp1800",
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.desc = "PetaLogix linux refdesign for xilinx Spartan 3ADSP1800",
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.init = petalogix_s3adsp1800_init,
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.is_default = 1,
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};
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static void petalogix_s3adsp1800_machine_init(void)
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{
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qemu_register_machine(&petalogix_s3adsp1800_machine);
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}
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machine_init(petalogix_s3adsp1800_machine_init);
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