4ab6cb4c62
tpm_crb is a device for TPM 2.0 Command Response Buffer (CRB) Interface as defined in TCG PC Client Platform TPM Profile (PTP) Specification Family “2.0” Level 00 Revision 01.03 v22. The PTP allows device implementation to switch between TIS and CRB model at run time, but given that CRB is a simpler device to implement, I chose to implement it as a different device. The device doesn't implement other locality than 0 for now (my laptop TPM doesn't either, so I assume this isn't so bad) Tested with some success with Linux upstream and Windows 10, seabios & modified ovmf. The device is recognized and correctly transmit command/response with passthrough & emu. However, we are missing PPI ACPI part atm. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.vnet.ibm.com> Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
86 lines
2.5 KiB
C
86 lines
2.5 KiB
C
/*
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* tpm.h - TPM ACPI definitions
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*
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* Copyright (C) 2014 IBM Corporation
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*
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* Authors:
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* Stefan Berger <stefanb@us.ibm.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*
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* Implementation of the TIS interface according to specs found at
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* http://www.trustedcomputinggroup.org
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*
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*/
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#ifndef HW_ACPI_TPM_H
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#define HW_ACPI_TPM_H
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#include "hw/registerfields.h"
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#define TPM_TIS_ADDR_BASE 0xFED40000
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#define TPM_TIS_ADDR_SIZE 0x5000
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#define TPM_TIS_IRQ 5
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REG32(CRB_LOC_STATE, 0x00)
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FIELD(CRB_LOC_STATE, tpmEstablished, 0, 1)
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FIELD(CRB_LOC_STATE, locAssigned, 1, 1)
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FIELD(CRB_LOC_STATE, activeLocality, 2, 3)
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FIELD(CRB_LOC_STATE, reserved, 5, 2)
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FIELD(CRB_LOC_STATE, tpmRegValidSts, 7, 1)
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REG32(CRB_LOC_CTRL, 0x08)
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REG32(CRB_LOC_STS, 0x0C)
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FIELD(CRB_LOC_STS, Granted, 0, 1)
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FIELD(CRB_LOC_STS, beenSeized, 1, 1)
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REG32(CRB_INTF_ID, 0x30)
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FIELD(CRB_INTF_ID, InterfaceType, 0, 4)
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FIELD(CRB_INTF_ID, InterfaceVersion, 4, 4)
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FIELD(CRB_INTF_ID, CapLocality, 8, 1)
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FIELD(CRB_INTF_ID, CapCRBIdleBypass, 9, 1)
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FIELD(CRB_INTF_ID, Reserved1, 10, 1)
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FIELD(CRB_INTF_ID, CapDataXferSizeSupport, 11, 2)
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FIELD(CRB_INTF_ID, CapFIFO, 13, 1)
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FIELD(CRB_INTF_ID, CapCRB, 14, 1)
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FIELD(CRB_INTF_ID, CapIFRes, 15, 2)
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FIELD(CRB_INTF_ID, InterfaceSelector, 17, 2)
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FIELD(CRB_INTF_ID, IntfSelLock, 19, 1)
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FIELD(CRB_INTF_ID, Reserved2, 20, 4)
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FIELD(CRB_INTF_ID, RID, 24, 8)
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REG32(CRB_INTF_ID2, 0x34)
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FIELD(CRB_INTF_ID2, VID, 0, 16)
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FIELD(CRB_INTF_ID2, DID, 16, 16)
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REG32(CRB_CTRL_EXT, 0x38)
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REG32(CRB_CTRL_REQ, 0x40)
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REG32(CRB_CTRL_STS, 0x44)
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FIELD(CRB_CTRL_STS, tpmSts, 0, 1)
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FIELD(CRB_CTRL_STS, tpmIdle, 1, 1)
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REG32(CRB_CTRL_CANCEL, 0x48)
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REG32(CRB_CTRL_START, 0x4C)
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REG32(CRB_INT_ENABLED, 0x50)
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REG32(CRB_INT_STS, 0x54)
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REG32(CRB_CTRL_CMD_SIZE, 0x58)
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REG32(CRB_CTRL_CMD_LADDR, 0x5C)
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REG32(CRB_CTRL_CMD_HADDR, 0x60)
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REG32(CRB_CTRL_RSP_SIZE, 0x64)
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REG32(CRB_CTRL_RSP_ADDR, 0x68)
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REG32(CRB_DATA_BUFFER, 0x80)
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#define TPM_CRB_ADDR_BASE 0xFED40000
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#define TPM_CRB_ADDR_SIZE 0x1000
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#define TPM_CRB_ADDR_CTRL (TPM_CRB_ADDR_BASE + A_CRB_CTRL_REQ)
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#define TPM_CRB_R_MAX R_CRB_DATA_BUFFER
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#define TPM_LOG_AREA_MINIMUM_SIZE (64 * 1024)
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#define TPM_TCPA_ACPI_CLASS_CLIENT 0
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#define TPM_TCPA_ACPI_CLASS_SERVER 1
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#define TPM2_ACPI_CLASS_CLIENT 0
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#define TPM2_ACPI_CLASS_SERVER 1
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#define TPM2_START_METHOD_MMIO 6
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#define TPM2_START_METHOD_CRB 7
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#endif /* HW_ACPI_TPM_H */
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