021836936e
Load FDT table into dram memory space, and the addr is 2 MiB. Since lowmem region starts from 0, FDT base address is located at 2 MiB to avoid NULL pointer access. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Acked-by: Song Gao <gaosong@loongson.cn> Message-Id: <20221028014007.2718352-2-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
58 lines
1.7 KiB
C
58 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Definitions for loongarch board emulation.
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*
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* Copyright (C) 2021 Loongson Technology Corporation Limited
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*/
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#ifndef HW_LOONGARCH_H
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#define HW_LOONGARCH_H
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#include "target/loongarch/cpu.h"
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#include "hw/boards.h"
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#include "qemu/queue.h"
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#include "hw/intc/loongarch_ipi.h"
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#define LOONGARCH_MAX_VCPUS 4
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#define VIRT_ISA_IO_BASE 0x18000000UL
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#define VIRT_ISA_IO_SIZE 0x0004000
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#define VIRT_FWCFG_BASE 0x1e020000UL
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#define VIRT_BIOS_BASE 0x1c000000UL
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#define VIRT_BIOS_SIZE (4 * MiB)
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#define VIRT_LOWMEM_BASE 0
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#define VIRT_LOWMEM_SIZE 0x10000000
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#define VIRT_HIGHMEM_BASE 0x90000000
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#define VIRT_GED_EVT_ADDR 0x100e0000
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#define VIRT_GED_MEM_ADDR (VIRT_GED_EVT_ADDR + ACPI_GED_EVT_SEL_LEN)
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#define VIRT_GED_REG_ADDR (VIRT_GED_MEM_ADDR + MEMORY_HOTPLUG_IO_LEN)
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struct LoongArchMachineState {
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/*< private >*/
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MachineState parent_obj;
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IPICore ipi_core[MAX_IPI_CORE_NUM];
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MemoryRegion lowmem;
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MemoryRegion highmem;
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MemoryRegion isa_io;
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MemoryRegion bios;
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bool bios_loaded;
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/* State for other subsystems/APIs: */
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FWCfgState *fw_cfg;
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Notifier machine_done;
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OnOffAuto acpi;
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char *oem_id;
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char *oem_table_id;
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DeviceState *acpi_ged;
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int fdt_size;
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DeviceState *platform_bus_dev;
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PCIBus *pci_bus;
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};
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#define TYPE_LOONGARCH_MACHINE MACHINE_TYPE_NAME("virt")
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OBJECT_DECLARE_SIMPLE_TYPE(LoongArchMachineState, LOONGARCH_MACHINE)
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bool loongarch_is_acpi_enabled(LoongArchMachineState *lams);
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void loongarch_acpi_setup(LoongArchMachineState *lams);
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#endif
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