01e02f5aa7
For the rpi1 and 2 we want to boot the Linux kernel via some custom setup code that makes sure that the SMC instruction acts as a no-op, because it's used for cache maintenance. The rpi3 boots AArch64 kernels, which don't need SMC for cache maintenance and always expect to be booted non-secure. Don't fill in the aarch32-specific parts of the binfo struct. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180313153458.26822-2-peter.maydell@linaro.org
222 lines
7.7 KiB
C
222 lines
7.7 KiB
C
/*
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* Raspberry Pi emulation (c) 2012 Gregory Estrade
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* Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
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*
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* Rasperry Pi 2 emulation Copyright (c) 2015, Microsoft
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* Written by Andrew Baumann
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*
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* Raspberry Pi 3 emulation Copyright (c) 2018 Zoltán Baldaszti
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* Upstream code cleanup (c) 2018 Pekka Enberg
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*
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* This code is licensed under the GNU GPLv2 and later.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qemu-common.h"
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#include "cpu.h"
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#include "hw/arm/bcm2836.h"
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#include "qemu/error-report.h"
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#include "hw/boards.h"
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#include "hw/loader.h"
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#include "hw/arm/arm.h"
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#include "sysemu/sysemu.h"
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#define SMPBOOT_ADDR 0x300 /* this should leave enough space for ATAGS */
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#define MVBAR_ADDR 0x400 /* secure vectors */
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#define BOARDSETUP_ADDR (MVBAR_ADDR + 0x20) /* board setup code */
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#define FIRMWARE_ADDR_2 0x8000 /* Pi 2 loads kernel.img here by default */
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#define FIRMWARE_ADDR_3 0x80000 /* Pi 3 loads kernel.img here by default */
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/* Table of Linux board IDs for different Pi versions */
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static const int raspi_boardid[] = {[1] = 0xc42, [2] = 0xc43, [3] = 0xc44};
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typedef struct RasPiState {
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BCM2836State soc;
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MemoryRegion ram;
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} RasPiState;
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static void write_smpboot(ARMCPU *cpu, const struct arm_boot_info *info)
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{
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static const uint32_t smpboot[] = {
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0xe1a0e00f, /* mov lr, pc */
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0xe3a0fe00 + (BOARDSETUP_ADDR >> 4), /* mov pc, BOARDSETUP_ADDR */
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0xee100fb0, /* mrc p15, 0, r0, c0, c0, 5;get core ID */
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0xe7e10050, /* ubfx r0, r0, #0, #2 ;extract LSB */
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0xe59f5014, /* ldr r5, =0x400000CC ;load mbox base */
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0xe320f001, /* 1: yield */
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0xe7953200, /* ldr r3, [r5, r0, lsl #4] ;read mbox for our core*/
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0xe3530000, /* cmp r3, #0 ;spin while zero */
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0x0afffffb, /* beq 1b */
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0xe7853200, /* str r3, [r5, r0, lsl #4] ;clear mbox */
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0xe12fff13, /* bx r3 ;jump to target */
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0x400000cc, /* (constant: mailbox 3 read/clear base) */
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};
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/* check that we don't overrun board setup vectors */
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QEMU_BUILD_BUG_ON(SMPBOOT_ADDR + sizeof(smpboot) > MVBAR_ADDR);
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/* check that board setup address is correctly relocated */
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QEMU_BUILD_BUG_ON((BOARDSETUP_ADDR & 0xf) != 0
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|| (BOARDSETUP_ADDR >> 4) >= 0x100);
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rom_add_blob_fixed("raspi_smpboot", smpboot, sizeof(smpboot),
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info->smp_loader_start);
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}
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static void write_board_setup(ARMCPU *cpu, const struct arm_boot_info *info)
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{
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arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR);
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}
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static void reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info)
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{
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CPUState *cs = CPU(cpu);
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cpu_set_pc(cs, info->smp_loader_start);
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}
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static void setup_boot(MachineState *machine, int version, size_t ram_size)
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{
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static struct arm_boot_info binfo;
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int r;
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binfo.board_id = raspi_boardid[version];
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binfo.ram_size = ram_size;
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binfo.nb_cpus = smp_cpus;
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if (version <= 2) {
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/* The rpi1 and 2 require some custom setup code to run in Secure
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* mode before booting a kernel (to set up the SMC vectors so
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* that we get a no-op SMC; this is used by Linux to call the
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* firmware for some cache maintenance operations.
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* The rpi3 doesn't need this.
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*/
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binfo.board_setup_addr = BOARDSETUP_ADDR;
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binfo.write_board_setup = write_board_setup;
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binfo.secure_board_setup = true;
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binfo.secure_boot = true;
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}
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/* Pi2 and Pi3 requires SMP setup */
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if (version >= 2) {
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binfo.smp_loader_start = SMPBOOT_ADDR;
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binfo.write_secondary_boot = write_smpboot;
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binfo.secondary_cpu_reset_hook = reset_secondary;
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}
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/* If the user specified a "firmware" image (e.g. UEFI), we bypass
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* the normal Linux boot process
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*/
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if (machine->firmware) {
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hwaddr firmware_addr = version == 3 ? FIRMWARE_ADDR_3 : FIRMWARE_ADDR_2;
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/* load the firmware image (typically kernel.img) */
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r = load_image_targphys(machine->firmware, firmware_addr,
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ram_size - firmware_addr);
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if (r < 0) {
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error_report("Failed to load firmware from %s", machine->firmware);
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exit(1);
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}
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binfo.entry = firmware_addr;
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binfo.firmware_loaded = true;
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} else {
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binfo.kernel_filename = machine->kernel_filename;
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binfo.kernel_cmdline = machine->kernel_cmdline;
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binfo.initrd_filename = machine->initrd_filename;
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}
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arm_load_kernel(ARM_CPU(first_cpu), &binfo);
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}
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static void raspi_init(MachineState *machine, int version)
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{
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RasPiState *s = g_new0(RasPiState, 1);
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uint32_t vcram_size;
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DriveInfo *di;
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BlockBackend *blk;
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BusState *bus;
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DeviceState *carddev;
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object_initialize(&s->soc, sizeof(s->soc), TYPE_BCM2836);
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object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc),
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&error_abort);
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/* Allocate and map RAM */
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memory_region_allocate_system_memory(&s->ram, OBJECT(machine), "ram",
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machine->ram_size);
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/* FIXME: Remove when we have custom CPU address space support */
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memory_region_add_subregion_overlap(get_system_memory(), 0, &s->ram, 0);
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/* Setup the SOC */
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object_property_add_const_link(OBJECT(&s->soc), "ram", OBJECT(&s->ram),
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&error_abort);
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object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type",
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&error_abort);
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object_property_set_int(OBJECT(&s->soc), smp_cpus, "enabled-cpus",
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&error_abort);
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int board_rev = version == 3 ? 0xa02082 : 0xa21041;
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object_property_set_int(OBJECT(&s->soc), board_rev, "board-rev",
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&error_abort);
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object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_abort);
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/* Create and plug in the SD cards */
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di = drive_get_next(IF_SD);
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blk = di ? blk_by_legacy_dinfo(di) : NULL;
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bus = qdev_get_child_bus(DEVICE(&s->soc), "sd-bus");
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if (bus == NULL) {
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error_report("No SD bus found in SOC object");
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exit(1);
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}
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carddev = qdev_create(bus, TYPE_SD_CARD);
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qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
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object_property_set_bool(OBJECT(carddev), true, "realized", &error_fatal);
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vcram_size = object_property_get_uint(OBJECT(&s->soc), "vcram-size",
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&error_abort);
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setup_boot(machine, version, machine->ram_size - vcram_size);
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}
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static void raspi2_init(MachineState *machine)
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{
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raspi_init(machine, 2);
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}
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static void raspi2_machine_init(MachineClass *mc)
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{
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mc->desc = "Raspberry Pi 2";
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mc->init = raspi2_init;
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mc->block_default_type = IF_SD;
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mc->no_parallel = 1;
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mc->no_floppy = 1;
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mc->no_cdrom = 1;
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mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a15");
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mc->max_cpus = BCM2836_NCPUS;
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mc->min_cpus = BCM2836_NCPUS;
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mc->default_cpus = BCM2836_NCPUS;
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mc->default_ram_size = 1024 * 1024 * 1024;
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mc->ignore_memory_transaction_failures = true;
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};
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DEFINE_MACHINE("raspi2", raspi2_machine_init)
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#ifdef TARGET_AARCH64
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static void raspi3_init(MachineState *machine)
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{
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raspi_init(machine, 3);
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}
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static void raspi3_machine_init(MachineClass *mc)
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{
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mc->desc = "Raspberry Pi 3";
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mc->init = raspi3_init;
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mc->block_default_type = IF_SD;
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mc->no_parallel = 1;
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mc->no_floppy = 1;
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mc->no_cdrom = 1;
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mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
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mc->max_cpus = BCM2836_NCPUS;
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mc->min_cpus = BCM2836_NCPUS;
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mc->default_cpus = BCM2836_NCPUS;
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mc->default_ram_size = 1024 * 1024 * 1024;
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}
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DEFINE_MACHINE("raspi3", raspi3_machine_init)
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#endif
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