David Gibson f43e35255c Virtual hash page table handling on pSeries machine ... On pSeries logical partitions, excepting the old POWER4-style full system partitions, the guest does not have direct access to the hardware page table. Instead, the pagetable exists in hypervisor memory, and the guest must manipulate it with hypercalls. However, our current pSeries emulation more closely resembles the old style where the guest must set up and handle the pagetables itself. This patch converts it to act like a modern partition. This involves two things: first, the hash translation path is modified to permit the has table to be stored externally to the emulated machine's RAM. The pSeries machine init code configures the CPUs to use this mode. Secondly, we emulate the PAPR hypercalls for manipulating the external hashed page table. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>		2011-04-01 18:34:55 +02:00
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cpu.h	Virtual hash page table handling on pSeries machine	2011-04-01 18:34:55 +02:00
exec.h	inline cpu_halted into sole caller	2011-03-13 14:44:21 +00:00
helper_regs.h	Replace always_inline with inline	2009-08-16 09:06:54 +00:00
helper.c	Virtual hash page table handling on pSeries machine	2011-04-01 18:34:55 +02:00
helper.h	Correct ppc popcntb logic, implement popcntw and popcntd	2011-04-01 18:34:54 +02:00
kvm_ppc.c	change all other clock references to use nanosecond resolution accessors	2011-03-21 09:23:23 +01:00
kvm_ppc.h	KVM: PPC: Add level based interrupt logic	2010-09-05 11:50:48 +02:00
kvm.c	Parse SDR1 on mtspr instead of at translate time	2011-04-01 18:34:55 +02:00
machine.c	Parse SDR1 on mtspr instead of at translate time	2011-04-01 18:34:55 +02:00
mfrom_table_gen.c
mfrom_table.c
op_helper.c	Correct ppc popcntb logic, implement popcntw and popcntd	2011-04-01 18:34:54 +02:00
STATUS
translate_init.c	Add POWER7 support for ppc	2011-04-01 18:34:55 +02:00
translate.c	Parse SDR1 on mtspr instead of at translate time	2011-04-01 18:34:55 +02:00