006f3a48e0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6560 c046a42c-6fe2-441c-8c8c-71466251a162
352 lines
12 KiB
C
352 lines
12 KiB
C
/*
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* QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
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*
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* Copyright (c) 2004-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "hw.h"
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#include "ppc.h"
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#include "ppc_mac.h"
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#include "mac_dbdma.h"
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#include "nvram.h"
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#include "pc.h"
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#include "pci.h"
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#include "net.h"
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#include "sysemu.h"
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#include "boards.h"
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#include "fw_cfg.h"
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#include "escc.h"
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#define MAX_IDE_BUS 2
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#define VGA_BIOS_SIZE 65536
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#define CFG_ADDR 0xf0000510
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/* debug UniNorth */
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//#define DEBUG_UNIN
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#ifdef DEBUG_UNIN
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#define UNIN_DPRINTF(fmt, args...) \
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do { printf("UNIN: " fmt , ##args); } while (0)
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#else
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#define UNIN_DPRINTF(fmt, args...)
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#endif
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/* UniN device */
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static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
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{
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UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
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}
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static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
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{
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uint32_t value;
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value = 0;
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UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
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return value;
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}
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static CPUWriteMemoryFunc *unin_write[] = {
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&unin_writel,
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&unin_writel,
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&unin_writel,
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};
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static CPUReadMemoryFunc *unin_read[] = {
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&unin_readl,
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&unin_readl,
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&unin_readl,
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};
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/* PowerPC Mac99 hardware initialisation */
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static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
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const char *boot_device,
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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const char *cpu_model)
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{
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CPUState *env = NULL, *envs[MAX_CPUS];
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char buf[1024];
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qemu_irq *pic, **openpic_irqs;
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int unin_memory;
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int linux_boot, i;
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ram_addr_t ram_offset, vga_ram_offset, bios_offset, vga_bios_offset;
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uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
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PCIBus *pci_bus;
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nvram_t nvram;
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#if 0
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MacIONVRAMState *nvr;
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int nvram_mem_index;
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#endif
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m48t59_t *m48t59;
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int vga_bios_size, bios_size;
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qemu_irq *dummy_irq;
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int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
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int ppc_boot_device;
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int index;
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BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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void *fw_cfg;
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void *dbdma;
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linux_boot = (kernel_filename != NULL);
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/* init CPUs */
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if (cpu_model == NULL)
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cpu_model = "default";
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for (i = 0; i < smp_cpus; i++) {
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env = cpu_init(cpu_model);
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if (!env) {
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fprintf(stderr, "Unable to find PowerPC CPU definition\n");
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exit(1);
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}
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/* Set time-base frequency to 100 Mhz */
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cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
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#if 0
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env->osi_call = vga_osi_call;
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#endif
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qemu_register_reset(&cpu_ppc_reset, env);
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envs[i] = env;
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}
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/* allocate RAM */
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ram_offset = qemu_ram_alloc(ram_size);
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cpu_register_physical_memory(0, ram_size, ram_offset);
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/* allocate VGA RAM */
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vga_ram_offset = qemu_ram_alloc(vga_ram_size);
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/* allocate and load BIOS */
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bios_offset = qemu_ram_alloc(BIOS_SIZE);
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if (bios_name == NULL)
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bios_name = PROM_FILENAME;
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snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
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cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
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/* Load OpenBIOS (ELF) */
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bios_size = load_elf(buf, 0, NULL, NULL, NULL);
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if (bios_size < 0 || bios_size > BIOS_SIZE) {
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cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
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exit(1);
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}
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/* allocate and load VGA BIOS */
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vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
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snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
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vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
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if (vga_bios_size < 0) {
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/* if no bios is present, we can still work */
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fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
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vga_bios_size = 0;
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} else {
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/* set a specific header (XXX: find real Apple format for NDRV
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drivers) */
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phys_ram_base[vga_bios_offset] = 'N';
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phys_ram_base[vga_bios_offset + 1] = 'D';
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phys_ram_base[vga_bios_offset + 2] = 'R';
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phys_ram_base[vga_bios_offset + 3] = 'V';
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cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
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vga_bios_size);
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vga_bios_size += 8;
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}
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if (linux_boot) {
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kernel_base = KERNEL_LOAD_ADDR;
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/* now we can load the kernel */
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kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
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if (kernel_size < 0) {
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cpu_abort(env, "qemu: could not load kernel '%s'\n",
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kernel_filename);
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exit(1);
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}
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/* load initrd */
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if (initrd_filename) {
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initrd_base = INITRD_LOAD_ADDR;
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initrd_size = load_image(initrd_filename,
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phys_ram_base + initrd_base);
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if (initrd_size < 0) {
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cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
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initrd_filename);
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exit(1);
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}
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} else {
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initrd_base = 0;
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initrd_size = 0;
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}
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ppc_boot_device = 'm';
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} else {
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kernel_base = 0;
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kernel_size = 0;
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initrd_base = 0;
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initrd_size = 0;
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ppc_boot_device = '\0';
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/* We consider that NewWorld PowerMac never have any floppy drive
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* For now, OHW cannot boot from the network.
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*/
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for (i = 0; boot_device[i] != '\0'; i++) {
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if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
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ppc_boot_device = boot_device[i];
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break;
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}
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}
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if (ppc_boot_device == '\0') {
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fprintf(stderr, "No valid boot device for Mac99 machine\n");
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exit(1);
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}
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}
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isa_mem_base = 0x80000000;
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/* Register 8 MB of ISA IO space */
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isa_mmio_init(0xf2000000, 0x00800000);
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/* UniN init */
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unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
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cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
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openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
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openpic_irqs[0] =
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qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
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for (i = 0; i < smp_cpus; i++) {
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/* Mac99 IRQ connection between OpenPIC outputs pins
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* and PowerPC input pins
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*/
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switch (PPC_INPUT(env)) {
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case PPC_FLAGS_INPUT_6xx:
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openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
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openpic_irqs[i][OPENPIC_OUTPUT_INT] =
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((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
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openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
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((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
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openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
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((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
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/* Not connected ? */
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openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
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/* Check this */
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openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
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((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
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break;
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#if defined(TARGET_PPC64)
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case PPC_FLAGS_INPUT_970:
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openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
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openpic_irqs[i][OPENPIC_OUTPUT_INT] =
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((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
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openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
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((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
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openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
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((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
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/* Not connected ? */
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openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
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/* Check this */
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openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
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((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
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break;
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#endif /* defined(TARGET_PPC64) */
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default:
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cpu_abort(env, "Bus model not supported on mac99 machine\n");
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exit(1);
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}
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}
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pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
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pci_bus = pci_pmac_init(pic);
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/* init basic PC hardware */
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pci_vga_init(pci_bus, phys_ram_base + vga_ram_offset,
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vga_ram_offset, vga_ram_size,
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vga_bios_offset, vga_bios_size);
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/* XXX: suppress that */
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dummy_irq = i8259_init(NULL);
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escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
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serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
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for(i = 0; i < nb_nics; i++)
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pci_nic_init(pci_bus, &nd_table[i], -1, "ne2k_pci");
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if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
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fprintf(stderr, "qemu: too many IDE bus\n");
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exit(1);
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}
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for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
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index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
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if (index != -1)
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hd[i] = drives_table[index].bdrv;
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else
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hd[i] = NULL;
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}
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dbdma = DBDMA_init(&dbdma_mem_index);
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pci_cmd646_ide_init(pci_bus, hd, 0);
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/* cuda also initialize ADB */
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cuda_init(&cuda_mem_index, pic[0x19]);
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adb_kbd_init(&adb_bus);
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adb_mouse_init(&adb_bus);
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macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
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dbdma_mem_index, cuda_mem_index, NULL, 0, NULL,
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escc_mem_index);
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if (usb_enabled) {
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usb_ohci_init_pci(pci_bus, 3, -1);
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}
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if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
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graphic_depth = 15;
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#if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
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/* The NewWorld NVRAM is not located in the MacIO device */
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nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
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pmac_format_nvram_partition(nvr, 0x2000);
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macio_nvram_map(nvr, 0xFFF04000);
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nvram.opaque = nvr;
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nvram.read_fn = &macio_nvram_read;
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nvram.write_fn = &macio_nvram_write;
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#else
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m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
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nvram.opaque = m48t59;
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nvram.read_fn = &m48t59_read;
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nvram.write_fn = &m48t59_write;
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#endif
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PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "MAC99", ram_size,
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ppc_boot_device, kernel_base, kernel_size,
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kernel_cmdline,
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initrd_base, initrd_size,
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/* XXX: need an option to load a NVRAM image */
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0,
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graphic_width, graphic_height, graphic_depth);
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/* No PCI init: the BIOS will do it */
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fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
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fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
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fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
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fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99);
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}
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QEMUMachine core99_machine = {
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.name = "mac99",
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.desc = "Mac99 based PowerMAC",
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.init = ppc_core99_init,
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.ram_require = BIOS_SIZE + VGA_BIOS_SIZE + VGA_RAM_SIZE,
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.max_cpus = MAX_CPUS,
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};
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