fcf5ef2ab5
We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part] Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part] Acked-by: Michael Walle <michael@walle.cc> [lm32 part] Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part] Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part] Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part] Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part] Acked-by: Richard Henderson <rth@twiddle.net> [alpha part] Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part] Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part] Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [crisµblaze part] Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part] Signed-off-by: Thomas Huth <thuth@redhat.com>
104 lines
2.8 KiB
C
104 lines
2.8 KiB
C
/*
|
|
* ARM gdb server stub
|
|
*
|
|
* Copyright (c) 2003-2005 Fabrice Bellard
|
|
* Copyright (c) 2013 SUSE LINUX Products GmbH
|
|
*
|
|
* This library is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU Lesser General Public
|
|
* License as published by the Free Software Foundation; either
|
|
* version 2 of the License, or (at your option) any later version.
|
|
*
|
|
* This library is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
* Lesser General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU Lesser General Public
|
|
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
#include "qemu/osdep.h"
|
|
#include "qemu-common.h"
|
|
#include "cpu.h"
|
|
#include "exec/gdbstub.h"
|
|
|
|
/* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect
|
|
whatever the target description contains. Due to a historical mishap
|
|
the FPA registers appear in between core integer regs and the CPSR.
|
|
We hack round this by giving the FPA regs zero size when talking to a
|
|
newer gdb. */
|
|
|
|
int arm_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
|
|
{
|
|
ARMCPU *cpu = ARM_CPU(cs);
|
|
CPUARMState *env = &cpu->env;
|
|
|
|
if (n < 16) {
|
|
/* Core integer register. */
|
|
return gdb_get_reg32(mem_buf, env->regs[n]);
|
|
}
|
|
if (n < 24) {
|
|
/* FPA registers. */
|
|
if (gdb_has_xml) {
|
|
return 0;
|
|
}
|
|
memset(mem_buf, 0, 12);
|
|
return 12;
|
|
}
|
|
switch (n) {
|
|
case 24:
|
|
/* FPA status register. */
|
|
if (gdb_has_xml) {
|
|
return 0;
|
|
}
|
|
return gdb_get_reg32(mem_buf, 0);
|
|
case 25:
|
|
/* CPSR */
|
|
return gdb_get_reg32(mem_buf, cpsr_read(env));
|
|
}
|
|
/* Unknown register. */
|
|
return 0;
|
|
}
|
|
|
|
int arm_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
|
|
{
|
|
ARMCPU *cpu = ARM_CPU(cs);
|
|
CPUARMState *env = &cpu->env;
|
|
uint32_t tmp;
|
|
|
|
tmp = ldl_p(mem_buf);
|
|
|
|
/* Mask out low bit of PC to workaround gdb bugs. This will probably
|
|
cause problems if we ever implement the Jazelle DBX extensions. */
|
|
if (n == 15) {
|
|
tmp &= ~1;
|
|
}
|
|
|
|
if (n < 16) {
|
|
/* Core integer register. */
|
|
env->regs[n] = tmp;
|
|
return 4;
|
|
}
|
|
if (n < 24) { /* 16-23 */
|
|
/* FPA registers (ignored). */
|
|
if (gdb_has_xml) {
|
|
return 0;
|
|
}
|
|
return 12;
|
|
}
|
|
switch (n) {
|
|
case 24:
|
|
/* FPA status register (ignored). */
|
|
if (gdb_has_xml) {
|
|
return 0;
|
|
}
|
|
return 4;
|
|
case 25:
|
|
/* CPSR */
|
|
cpsr_write(env, tmp, 0xffffffff, CPSRWriteByGDBStub);
|
|
return 4;
|
|
}
|
|
/* Unknown register. */
|
|
return 0;
|
|
}
|