ad003650d5
Accesses from a 32-bit environment (32-bit code segment for instruction accesses, EFER.LMA==0 for processor accesses) have to mask away the upper 32 bits of the address. While a bit wasteful, the easiest way to do so is to use separate MMU indexes. These days, QEMU anyway is compiled with a fixed value for NB_MMU_MODES. Split MMU_USER_IDX, MMU_KSMAP_IDX and MMU_KNOSMAP_IDX in two. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> (cherry picked from commit 90f641531c782c873a05895f411c05fbbbef3c49) Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> (Mjt: move changes for x86_cpu_mmu_index() to cpu_mmu_index() due to missing v8.2.0-1030-gace0c5fe5950 "target/i386: Populate CPUClass.mmu_index" Increase NB_MMU_MODES from 5 to 8 in target/i386/cpu-param.h due to missing v7.2.0-2640-gffd824f3f32d "include/exec: Set default NB_MMU_MODES to 16" v7.2.0-2647-g6787318a5d86 "target/i386: Remove NB_MMU_MODES define" which relaxed upper limit of MMU index for i386, since this commit starts using MMU_NESTED_IDX=7. Thanks Zhao Liu and Paolo Bonzini for the analisys and suggestions. )
33 lines
746 B
C
33 lines
746 B
C
/*
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* i386 cpu parameters for qemu.
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*
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* Copyright (c) 2003 Fabrice Bellard
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* SPDX-License-Identifier: LGPL-2.0+
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*/
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#ifndef I386_CPU_PARAM_H
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#define I386_CPU_PARAM_H
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#ifdef TARGET_X86_64
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# define TARGET_LONG_BITS 64
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# define TARGET_PHYS_ADDR_SPACE_BITS 52
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/*
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* ??? This is really 48 bits, sign-extended, but the only thing
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* accessible to userland with bit 48 set is the VSYSCALL, and that
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* is handled via other mechanisms.
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*/
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# define TARGET_VIRT_ADDR_SPACE_BITS 47
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#else
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# define TARGET_LONG_BITS 32
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# define TARGET_PHYS_ADDR_SPACE_BITS 36
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# define TARGET_VIRT_ADDR_SPACE_BITS 32
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#endif
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#define TARGET_PAGE_BITS 12
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#define NB_MMU_MODES 8
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#ifndef CONFIG_USER_ONLY
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# define TARGET_TB_PCREL 1
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#endif
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#endif
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