fd53ee268d
The th.sxstatus CSR can be used to identify available custom extension on T-Head CPUs. The CSR is documented here: https://github.com/T-head-Semi/thead-extension-spec/blob/master/xtheadsxstatus.adoc An important property of this patch is, that the th.sxstatus MAEE field is not set (indicating that XTheadMae is not available). XTheadMae is a memory attribute extension (similar to Svpbmt) which is implemented in many T-Head CPUs (C906, C910, etc.) and utilizes bits in PTEs that are marked as reserved. QEMU maintainers prefer to not implement XTheadMae, so we need give kernels a mechanism to identify if XTheadMae is available in a system or not. And this patch introduces this mechanism in QEMU in a way that's compatible with real HW (i.e., probing the th.sxstatus.MAEE bit). Further context can be found on the list: https://lists.gnu.org/archive/html/qemu-devel/2024-02/msg00775.html Reviewed-by: LIU Zhiwei <zhiwe_liu@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu> Message-ID: <20240429073656.2486732-1-christoph.muellner@vrull.eu> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
80 lines
2.1 KiB
C
80 lines
2.1 KiB
C
/*
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* T-Head-specific CSRs.
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*
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* Copyright (c) 2024 VRULL GmbH
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2 or later, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "cpu_vendorid.h"
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#define CSR_TH_SXSTATUS 0x5c0
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/* TH_SXSTATUS bits */
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#define TH_SXSTATUS_UCME BIT(16)
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#define TH_SXSTATUS_MAEE BIT(21)
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#define TH_SXSTATUS_THEADISAEE BIT(22)
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typedef struct {
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int csrno;
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int (*insertion_test)(RISCVCPU *cpu);
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riscv_csr_operations csr_ops;
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} riscv_csr;
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static RISCVException smode(CPURISCVState *env, int csrno)
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{
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if (riscv_has_ext(env, RVS)) {
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return RISCV_EXCP_NONE;
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}
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return RISCV_EXCP_ILLEGAL_INST;
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}
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static int test_thead_mvendorid(RISCVCPU *cpu)
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{
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if (cpu->cfg.mvendorid != THEAD_VENDOR_ID) {
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return -1;
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}
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return 0;
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}
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static RISCVException read_th_sxstatus(CPURISCVState *env, int csrno,
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target_ulong *val)
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{
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/* We don't set MAEE here, because QEMU does not implement MAEE. */
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*val = TH_SXSTATUS_UCME | TH_SXSTATUS_THEADISAEE;
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return RISCV_EXCP_NONE;
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}
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static riscv_csr th_csr_list[] = {
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{
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.csrno = CSR_TH_SXSTATUS,
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.insertion_test = test_thead_mvendorid,
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.csr_ops = { "th.sxstatus", smode, read_th_sxstatus }
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}
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};
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void th_register_custom_csrs(RISCVCPU *cpu)
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{
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for (size_t i = 0; i < ARRAY_SIZE(th_csr_list); i++) {
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int csrno = th_csr_list[i].csrno;
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riscv_csr_operations *csr_ops = &th_csr_list[i].csr_ops;
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if (!th_csr_list[i].insertion_test(cpu)) {
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riscv_set_csr_ops(csrno, csr_ops);
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}
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}
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}
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