qemu/hw/riscv
Daniel Henrique Barboza d3b96a5319 hw/riscv/riscv-iommu: fix riscv_iommu_validate_process_ctx() check
'mode' will never be RISCV_IOMMU_CAP_SV32. We are erroring out in the
'switch' right before it if 'mode' isn't 0, 8, 9 or 10.

'mode' should be check with RISCV_IOMMU_DC_FSC_IOSATP_MODE_SV32.

Reported by Coverity via a "DEADCODE" ticket.

Resolves: Coverity CID 1564781
Fixes: 0c54acb824 ("hw/riscv: add RISC-V IOMMU base emulation")
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20241104123839.533442-3-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-11-07 08:19:39 +10:00
..
boot.c target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI 2024-10-30 11:22:07 +10:00
Kconfig hw/riscv: add RISC-V IOMMU base emulation 2024-10-31 13:51:24 +10:00
meson.build hw/riscv: add riscv-iommu-pci reference device 2024-10-31 13:51:24 +10:00
microchip_pfsoc.c hw/riscv: Respect firmware ELF entry point 2024-10-02 15:11:51 +10:00
numa.c hw/riscv/numa.c: use g_autofree in socket_fdt_write_distance_matrix() 2024-02-09 20:43:14 +10:00
opentitan.c hw/riscv: Respect firmware ELF entry point 2024-10-02 15:11:51 +10:00
riscv_hart.c hw/riscv: hart: Add a new 'resetvec' property 2020-09-09 15:54:18 -07:00
riscv-iommu-bits.h hw/riscv/riscv-iommu: add DBG support 2024-10-31 13:51:24 +10:00
riscv-iommu-pci.c hw/riscv: add riscv-iommu-pci reference device 2024-10-31 13:51:24 +10:00
riscv-iommu.c hw/riscv/riscv-iommu: fix riscv_iommu_validate_process_ctx() check 2024-11-07 08:19:39 +10:00
riscv-iommu.h hw/riscv/riscv-iommu: add ATS support 2024-10-31 13:51:24 +10:00
shakti_c.c hw/riscv: Respect firmware ELF entry point 2024-10-02 15:11:51 +10:00
sifive_e.c hw: Remove unused inclusion of hw/char/serial.h 2024-10-03 19:33:23 +02:00
sifive_u.c target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI 2024-10-30 11:22:07 +10:00
spike.c hw/riscv: Respect firmware ELF entry point 2024-10-02 15:11:51 +10:00
trace-events hw/riscv/riscv-iommu: add ATS support 2024-10-31 13:51:24 +10:00
trace.h hw/riscv: add RISC-V IOMMU base emulation 2024-10-31 13:51:24 +10:00
virt-acpi-build.c hw/riscv/virt-acpi-build.c: Update the HID of RISC-V UART 2024-07-22 20:15:42 -04:00
virt.c hw/riscv/virt.c: support for RISC-V IOMMU PCIDevice hotplug 2024-10-31 13:51:24 +10:00