Commit Graph

91746 Commits

Author SHA1 Message Date
Richard Henderson
c88da1f3da This series adds support for the Hexagon Vector eXtensions (HVX)
These instructions are documented here
 https://developer.qualcomm.com/downloads/qualcomm-hexagon-v66-hvx-programmer-s-reference-manual
 
 Hexagon HVX is a wide vector engine with 128 byte vectors.
 
 See patch 01 Hexagon HVX README for more information.
 
 *** Changes in v2 ***
 Remove HVX tests from makefile to avoid need for toolchain upgrade
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Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20211103' into staging

This series adds support for the Hexagon Vector eXtensions (HVX)

These instructions are documented here
https://developer.qualcomm.com/downloads/qualcomm-hexagon-v66-hvx-programmer-s-reference-manual

Hexagon HVX is a wide vector engine with 128 byte vectors.

See patch 01 Hexagon HVX README for more information.

*** Changes in v2 ***
Remove HVX tests from makefile to avoid need for toolchain upgrade

# gpg: Signature made Wed 03 Nov 2021 05:14:44 PM EDT
# gpg:                using RSA key 7B0244FB12DE4422
# gpg: Good signature from "Taylor Simpson (Rock on) <tsimpson@quicinc.com>" [marginal]
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg:          It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 3635 C788 CE62 B91F D4C5  9AB4 7B02 44FB 12DE 4422

* remotes/quic/tags/pull-hex-20211103: (30 commits)
  Hexagon HVX (tests/tcg/hexagon) histogram test
  Hexagon HVX (tests/tcg/hexagon) scatter_gather test
  Hexagon HVX (tests/tcg/hexagon) hvx_misc test
  Hexagon HVX (tests/tcg/hexagon) vector_add_int test
  Hexagon HVX (target/hexagon) import instruction encodings
  Hexagon HVX (target/hexagon) instruction decoding
  Hexagon HVX (target/hexagon) import semantics
  Hexagon HVX (target/hexagon) helper overrides - vector stores
  Hexagon HVX (target/hexagon) helper overrides - vector loads
  Hexagon HVX (target/hexagon) helper overrides - vector splat and abs
  Hexagon HVX (target/hexagon) helper overrides - vector compares
  Hexagon HVX (target/hexagon) helper overrides - vector logical ops
  Hexagon HVX (target/hexagon) helper overrides - vector max/min
  Hexagon HVX (target/hexagon) helper overrides - vector shifts
  Hexagon HVX (target/hexagon) helper overrides - vector add & sub
  Hexagon HVX (target/hexagon) helper overrides - vector assign & cmov
  Hexagon HVX (target/hexagon) helper overrides for histogram instructions
  Hexagon HVX (target/hexagon) helper overrides infrastructure
  Hexagon HVX (target/hexagon) TCG generation
  Hexagon HVX (target/hexagon) helper functions
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-04 06:34:36 -04:00
Richard Henderson
b31b3fd0c0 tests/vm/openbsd: Update to release 7.0
There are two minor changes required in the script for the
network configuration of the newer release.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20211018205313.3526915-1-richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2021-11-04 10:32:01 +00:00
Alex Bennée
41bf739592 tests/tcg: remove debug polluting make output
Fixes: 5343a837cd ("tests/tcg: move some multiarch files and make conditional")
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211026173914.79377-1-alex.bennee@linaro.org>
2021-11-04 10:32:01 +00:00
Pavel Labath
4a82be77de gdbstub: Switch to the thread receiving a signal
Respond with Txxthread:yyyy; instead of a plain Sxx to indicate which
thread received the signal. Otherwise, the debugger will associate it
with the main one. Also automatically select this thread, as that is
what gdb expects.

Signed-off-by: Pavel Labath <pavel@labath.sk>
Message-Id: <20211019174953.36560-1-pavel@labath.sk>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211026102234.3961636-29-alex.bennee@linaro.org>
2021-11-04 10:32:01 +00:00
Alex Bennée
8ef3fdf952 tests/tcg: remove duplicate EXTRA_RUNS
We set it bellow outside the #if leg.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20211026102234.3961636-28-alex.bennee@linaro.org>
2021-11-04 10:32:01 +00:00
Alex Bennée
357af9be5c plugins: try and make plugin_insn_append more ergonomic
Currently we make the assumption that the guest frontend loads all
op code bytes sequentially. This mostly holds up for regular fixed
encodings but some architectures like s390x like to re-read the
instruction which causes weirdness to occur. Rather than changing the
frontends make the plugin API a little more ergonomic and able to
handle the re-read case.

Stuff will still get strange if we read ahead of the opcode but so far
no front ends have done that and this patch asserts the case so we can
catch it early if they do.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211026102234.3961636-21-alex.bennee@linaro.org>
2021-11-04 10:32:01 +00:00
Alex Bennée
e83f79b3fa tests/plugins: extend the insn plugin to track opcode sizes
This is mostly a convenience feature for identifying frontends that do
multiple repeat loads so I can test changes to the instruction
tracking interface.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20211026102234.3961636-20-alex.bennee@linaro.org>
2021-11-04 10:32:01 +00:00
Alex Bennée
a00e37a4be chardev: don't exit() straight away on C-a x
While there are a number of uses in the code-base of the exit(0)
pattern it gets in the way of clean exit which can do all of it's
house-keeping. In particular it was reported that you can crash
plugins this way because TCG can still be running on other threads
when the atexit callback is called.

Use qmp_quit() instead which takes care of some housekeeping before
triggering the shutdown.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reported-by: Lukas Jünger <lukas.junger@greensocs.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20211026102234.3961636-19-alex.bennee@linaro.org>
2021-11-04 10:32:01 +00:00
Mahmoud Mandour
b8312e04c8 docs/tcg-plugins: add L2 arguments to cache docs
cache plugin now allows optional L2 per-core cache emulation that can be
configured through plugin arguments, this commit adds this functionality
to the docs.

While I'm at it, I editted the bullet point for cache plugin to say:
    contrib/plugins/cache.c
instead of
    contrib/plugins/cache
to match other plugins.

Signed-off-by: Mahmoud Mandour <ma.mandourr@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210810134844.166490-6-ma.mandourr@gmail.com>
Message-Id: <20211026102234.3961636-18-alex.bennee@linaro.org>
2021-11-04 10:32:01 +00:00
Mahmoud Mandour
447f935674 plugins/cache: make L2 emulation optional through args
By default L2 is not enabled and is enabled by either using the
newly-introduced "l2" boolean argument, or by setting any of the L2
cache parameters using args. On specifying "l2=on", the default cache
configuration is used.

Signed-off-by: Mahmoud Mandour <ma.mandourr@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210810134844.166490-5-ma.mandourr@gmail.com>
Message-Id: <20211026102234.3961636-17-alex.bennee@linaro.org>
2021-11-04 10:32:01 +00:00
Mahmoud Mandour
53366adf9c plugins/cache: split command line arguments into name and value
This way of handling args is more lenient and sets a better framework to
parse boolean command line arguments.

Signed-off-by: Mahmoud Mandour <ma.mandourr@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210810134844.166490-4-ma.mandourr@gmail.com>
Message-Id: <20211026102234.3961636-16-alex.bennee@linaro.org>
2021-11-04 10:32:01 +00:00
Mahmoud Mandour
14f3110a99 plugins/cache: implement unified L2 cache emulation
This adds an implementation of a simple L2 configuration, in which a
unified L2 cache (stores both blocks of instructions and data) is
maintained for each core separately, with no inter-core interaction
taken in account. The L2 cache is used as a backup for L1 and is only
accessed if the wanted block does not exist in L1.

In terms of multi-threaded user-space emulation, the same approximation
of L1 is done, a static number of caches is maintained, and each and
every memory access initiated by a thread will have to go through one of
the available caches.

An atomic increment is used to maintain the number of L2 misses per
instruction.

The default cache parameters of L2 caches is:

    2MB cache size
    16-way associativity
    64-byte blocks

Signed-off-by: Mahmoud Mandour <ma.mandourr@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210810134844.166490-3-ma.mandourr@gmail.com>
Message-Id: <20211026102234.3961636-15-alex.bennee@linaro.org>
2021-11-04 10:32:01 +00:00
Mahmoud Mandour
ad039c506e plugins/cache: freed heap-allocated mutexes
Signed-off-by: Mahmoud Mandour <ma.mandourr@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210810134844.166490-2-ma.mandourr@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20211026102234.3961636-14-alex.bennee@linaro.org>
2021-11-04 10:32:01 +00:00
Paolo Bonzini
482cd5f08e ebpf: really include it only in system emulators
eBPF libraries are being included in user emulators, which is useless and
also breaks --static compilation if a shared library for libbpf is
present in the system.

Reported-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20211012162252.263933-1-pbonzini@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-bt: Warner Losh <imp@bsdimp.com>
Message-Id: <20211026102234.3961636-13-alex.bennee@linaro.org>
2021-11-04 10:32:01 +00:00
Alex Bennée
67f80eb4d0 tests/tcg: enable debian-nios2-cross for test building
Now we have a nios2 test image we can start using it to build tests.
However signal handling in nios2 is still broken so we disable the
signals and linux-test tests that trigger the bug.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211026102234.3961636-12-alex.bennee@linaro.org>
2021-11-04 10:32:01 +00:00
Alex Bennée
a7181a2876 tests/docker: split PARTIAL into PARTIAL and VIRTUAL images
This is mostly to ensure we don't include the toolchain and bootstrap
builds in DOCKER_IMAGES which is useful when verifying all images
still build.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Willian Rampazzo <willianr@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211026102234.3961636-10-alex.bennee@linaro.org>
2021-11-04 10:32:01 +00:00
Philippe Mathieu-Daudé
73594998f7 tests/tcg: Fix some targets default cross compiler path
We do not want a shell command substitution, but a parameter
substitution (with assignment). Replace $() -> ${}, otherwise
the expanded command return an empty string and the $cross_cc
variable is not set.

Fixes: 634ef789f8 ("tests/tcg: add more default compilers to configure.sh")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
[AJB: disable sh4 linux-test]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20211023164329.328137-1-f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211026102234.3961636-9-alex.bennee@linaro.org>
2021-11-04 10:32:01 +00:00
Richard Henderson
d654283d0b tests/tcg: Enable container_cross_cc for microblaze
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20211014224435.2539547-8-richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20211026102234.3961636-8-alex.bennee@linaro.org>
2021-11-04 10:32:01 +00:00
Richard Henderson
b58a4e688a tests/docker: Add debian-microblaze-cross image
Build the entire cross tool chain from source.
For this reason, default to caching.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
[AJB: Update MAINTAINERS]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20211014224435.2539547-7-richard.henderson@linaro.org>
Reviewed-by: Willian Rampazzo <willianr@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20211026102234.3961636-7-alex.bennee@linaro.org>
2021-11-04 10:32:00 +00:00
Richard Henderson
2eb4461ad5 tests/docker: Add debian-nios2-cross image
Build the entire cross tool chain from source.
For this reason, default to caching.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
[AJB: honour NOUSER in cached fetch and build, update MAINTAINERS]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20211014224435.2539547-6-richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Willian Rampazzo <willianr@redhat.com>
Message-Id: <20211026102234.3961636-6-alex.bennee@linaro.org>
2021-11-04 10:31:32 +00:00
Richard Henderson
752e235464 Migration Pull request
Hi
 
 This are the pending migration patches on the list:
 - Provide an error message for migration_cancel by Laurent
 - Don't dump colo cache when a guest core is requested by Lukas
 - Initialise Compression_conters for new migration by Yuxiating
   On top of that I added another missing initialization
 - Colo optimizations and crash improvements by Rao.
 
 Please, apply.
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Merge remote-tracking branch 'remotes/juanquintela/tags/migration-20211102-pull-request' into staging

Migration Pull request

Hi

This are the pending migration patches on the list:
- Provide an error message for migration_cancel by Laurent
- Don't dump colo cache when a guest core is requested by Lukas
- Initialise Compression_conters for new migration by Yuxiating
  On top of that I added another missing initialization
- Colo optimizations and crash improvements by Rao.

Please, apply.

# gpg: Signature made Wed 03 Nov 2021 04:45:35 AM EDT
# gpg:                using RSA key 1899FF8EDEBF58CCEE034B82F487EF185872D723
# gpg: Good signature from "Juan Quintela <quintela@redhat.com>" [full]
# gpg:                 aka "Juan Quintela <quintela@trasno.org>" [full]

* remotes/juanquintela/tags/migration-20211102-pull-request:
  Optimized the function of fill_connection_key.
  colo: Don't dump colo cache if dump-guest-core=off
  Changed the last-mode to none of first start COLO
  Removed the qemu_fclose() in colo_process_incoming_thread
  colo: fixed 'Segmentation fault' when the simplex mode PVM poweroff
  Fixed SVM hang when do failover before PVM crash
  Fixed qemu crash when guest power off in COLO mode
  Some minor optimizations for COLO
  migration: Zero migration compression counters
  migration: initialise compression_counters for a new migration
  migration: provide an error message to migration_cancel()

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-04 00:47:37 -04:00
Taylor Simpson
49278c1b0d Hexagon HVX (tests/tcg/hexagon) histogram test
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:38 -05:00
Taylor Simpson
62e93b084c Hexagon HVX (tests/tcg/hexagon) scatter_gather test
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:38 -05:00
Taylor Simpson
afb9539ebe Hexagon HVX (tests/tcg/hexagon) hvx_misc test
Tests for
    packet semantics
    vector loads (aligned and unaligned)
    vector stores (aligned and unaligned)
    vector masked stores
    vector new value store
    maximum HVX temps in a packet
    vector operations

Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:37 -05:00
Taylor Simpson
5920327449 Hexagon HVX (tests/tcg/hexagon) vector_add_int test
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:37 -05:00
Taylor Simpson
61c9aab09b Hexagon HVX (target/hexagon) import instruction encodings
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:36 -05:00
Taylor Simpson
60d1180b68 Hexagon HVX (target/hexagon) instruction decoding
Add new file to target/hexagon/meson.build

Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:36 -05:00
Taylor Simpson
887d61b288 Hexagon HVX (target/hexagon) import semantics
Imported from the Hexagon architecture library
    imported/allext.idef           Top level file for all extensions
    imported/mmvec/ext.idef        HVX instruction definitions

Support functions added to target/hexagon/genptr.c

Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:36 -05:00
Taylor Simpson
6b4f75975c Hexagon HVX (target/hexagon) helper overrides - vector stores
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:35 -05:00
Taylor Simpson
5d67ff6c6c Hexagon HVX (target/hexagon) helper overrides - vector loads
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:35 -05:00
Taylor Simpson
b0c2c182b9 Hexagon HVX (target/hexagon) helper overrides - vector splat and abs
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:34 -05:00
Taylor Simpson
242a2c2c0e Hexagon HVX (target/hexagon) helper overrides - vector compares
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:34 -05:00
Taylor Simpson
7f4808ec99 Hexagon HVX (target/hexagon) helper overrides - vector logical ops
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:34 -05:00
Taylor Simpson
2c8ffa8f82 Hexagon HVX (target/hexagon) helper overrides - vector max/min
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:33 -05:00
Taylor Simpson
8866635caf Hexagon HVX (target/hexagon) helper overrides - vector shifts
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:33 -05:00
Taylor Simpson
928f0ce4e8 Hexagon HVX (target/hexagon) helper overrides - vector add & sub
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:32 -05:00
Taylor Simpson
32488192c7 Hexagon HVX (target/hexagon) helper overrides - vector assign & cmov
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:32 -05:00
Taylor Simpson
7ba7657bc9 Hexagon HVX (target/hexagon) helper overrides for histogram instructions
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:32 -05:00
Taylor Simpson
d51bcabec1 Hexagon HVX (target/hexagon) helper overrides infrastructure
Build the infrastructure to create overrides for HVX instructions.
We create a new empty file (gen_tcg_hvx.h) that will be populated
in subsequent patches.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:31 -05:00
Taylor Simpson
a82dd54862 Hexagon HVX (target/hexagon) TCG generation
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:31 -05:00
Taylor Simpson
33e9ed11d5 Hexagon HVX (target/hexagon) helper functions
Probe and commit vector stores (masked and scatter/gather)
Log vector register writes
Add the execution counters to the debug log
Histogram instructions

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:30 -05:00
Taylor Simpson
82f8b3dce2 Hexagon HVX (target/hexagon) instruction utility functions
Functions to support scatter/gather
Add new file to target/hexagon/meson.build

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:30 -05:00
Taylor Simpson
9f1f2fe51e Hexagon HVX (target/hexagon) C preprocessor for decode tree
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:29 -05:00
Taylor Simpson
ccd9eec874 Hexagon HVX (target/hexagon) semantics generator - part 2
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:29 -05:00
Taylor Simpson
144da35776 Hexagon HVX (target/hexagon) semantics generator
Add HVX support to the semantics generator

Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:29 -05:00
Taylor Simpson
e3d143e98e Hexagon HVX (target/hexagon) import macro definitions
Imported from the Hexagon architecture library
    imported/allext_macros.def       Top level macro include for all extensions
    imported/macros.def              Scalar core macros (some HVX here)
    imported/mmvec/macros.def        HVX macro definitions
The macro definition files specify instruction attributes that are applied
to each instruction that reverences the macro.

Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:28 -05:00
Taylor Simpson
64458f4855 Hexagon HVX (target/hexagon) macros
macros to interface with the generator
macros referenced in instruction semantics

Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:28 -05:00
Taylor Simpson
828a210785 Hexagon HVX (target/hexagon) instruction attributes
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:27 -05:00
Taylor Simpson
40438b6707 Hexagon HVX (target/hexagon) register names
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:27 -05:00
Taylor Simpson
a1559537d1 Hexagon HVX (target/hexagon) add Hexagon Vector eXtensions (HVX) to core
HVX is a set of wide vector instructions.  Machine state includes
    vector registers (VRegs)
    vector predicate registers (QRegs)
    temporary registers for intermediate values
    store buffer (masked stores and scatter/gather)

Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
2021-11-03 16:01:26 -05:00