2 Commits

Author	SHA1	Message	Date
Edgar E. Iglesias	fb179055fe	hw/arm: versal: Use IRQs 111 - 118 for virtio-mmio ... Use IRQs 111 - 118 for virtio-mmio. The interrupts we're currently using 160+ are not available in the Versal GIC. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20181129163655.20370-4-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	2018-12-13 13:48:03 +00:00
Edgar E. Iglesias	b89de436ff	hw/arm: versal: Add a model of Xilinx Versal SoC ... Add a model of Xilinx Versal SoC. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20181102131913.1535-2-edgar.iglesias@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>	2018-11-02 14:10:53 +00:00