Commit Graph

30 Commits

Author SHA1 Message Date
Richard Henderson
c781cf96e2 target-alpha: Add high-resolution access to wall clock and an alarm.
The alarm is a fully general one-shot time comparator, which will be
usable under Linux as a hrtimer source.  It's much more flexible than
the RTC source available on real hardware.

The wall clock allows the guest access to the host timekeeping.  Much
like the KVM wall clock source for other guests.

Both are accessed via the PALcode Cserve entry point.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-08 08:49:09 -07:00
Richard Henderson
034ebc2753 target-alpha: Implement HALT IPR.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-08 08:49:09 -07:00
Richard Henderson
3b4fefd6e6 target-alpha: Implement TLB flush primitives.
Expose these via MTPR, more or less like the real HW does.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31 10:18:06 -07:00
Richard Henderson
129d8aa575 target-alpha: Rationalize internal processor registers.
Delete all the code that tried to emulate the real IPRs of some
unnamed CPU.  Replace those with just 3 slots that we can use to
communicate trap information between the helper functions that
signal exceptions and the OS trap handler.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31 10:18:05 -07:00
Richard Henderson
508b43eaf3 target-alpha: Merge HW_REI and HW_RET implementations.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31 10:18:05 -07:00
Richard Henderson
2374e73eda target-alpha: Fix translation of PALmode memory insns.
All of the "raw" memory accesses should be "phys" instead.  Fix
some confusion about argument ordering of the store routines.
Fix the implementation of store-conditional.

Delete the "alt-mode" helpers.  Because we only implement two
mmu modes, let /a imply user-mode unconditionally.

Leave some combinations of virt access without permission
checks as unimplemented.  There are too many hoops through
which to jump, and these insns will not be needed in the
emulation palcode.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31 10:18:04 -07:00
Richard Henderson
593f17e5f2 target-alpha: Implement cvtlq inline.
It's a simple shift and mask sequence.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27 05:50:41 +02:00
Richard Henderson
ac316ca4b7 target-alpha: Implement rs/rc properly.
This is a per-cpu flag; there's no need for a spinlock of any kind.

We were also failing to manipulate the flag with $31 as a target reg
and failing to clear the flag on execution of a return-from-interrupt
instruction.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27 05:50:41 +02:00
Richard Henderson
dc96be4b97 target-alpha: Implement cpys{, n, e} inline.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27 05:50:41 +02:00
Richard Henderson
735cf45f9c target-alpha: Implement cvtql inline.
It's a simple mask and shift sequence.
Also, fix a typo in the actual masks used.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-10 02:44:31 +02:00
Richard Henderson
0c287402a8 target-alpha: Add flags markups to helpers.h.
Almost all alpha helpers are at least TCG_CALL_CONST
and a fair few are also TCG_CALL_PURE.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-10 02:27:55 +02:00
Richard Henderson
f24518b502 target-alpha: Implement IEEE FP qualifiers.
IEEE FP instructions are split up so that the rounding mode
coming from the instruction and exceptions (both masking and
delivery) are handled external to the base FP operation.
FP exceptions are properly raised for non-finite inputs to
instructions that do not indicate software completion.

A shortcut is applied if CONFIG_SOFTFLOAT_INLINE is defined
at the top of translate.c: data is loaded and stored into
FP_STATUS directly instead of using the functional interface
defined by "softfloat.h".

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-28 17:45:07 +01:00
Richard Henderson
dbb30fe6ef target-alpha: Implement fp branch/cmov inline.
The old fcmov implementation had a typo:
-        tcg_gen_mov_i64(cpu_fir[rc], cpu_fir[ra]);
which moved the condition, not the second source, to the destination.

But it's also easy to implement the simplified fp comparison inline.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-17 18:12:02 +01:00
Richard Henderson
50eb6e5c04 target-alpha: Expand ins*h inline.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 21:36:21 +01:00
Richard Henderson
ffec44f14f target-alpha: Expand msk*h inline.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 21:36:21 +01:00
Richard Henderson
14ab163429 target-alpha: Expand msk*l inline.
Similar in difficulty to ext*l, already expanded.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 21:36:21 +01:00
Richard Henderson
248c42f393 target-alpha: Expand ins*l inline.
Similar in difficulty to ext*l, already expanded.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 21:36:21 +01:00
Richard Henderson
13e4df99ce target-alpha: Implement missing MVI instructions.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 21:26:26 +01:00
Richard Henderson
19188121b4 target-alpha: Remove bogus DO_TB_FLUSH code from translator.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 20:32:36 +01:00
aurel32
1a1f7dbcf1 target-alpha: remove amask helper
The direct use of helper_amask in translate.c was bogus (as env is not
assigned).  Directly code amask in tcg and remove the helper.

Signed-off-by: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7075 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-10 21:27:48 +00:00
aurel32
8579095b81 target-alpha: remove helper_load_implver
There is no need to use an helper.  Directly load the value with tcg code.

Signed-off-by: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7074 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-10 21:27:31 +00:00
pbrook
a7812ae412 TCG variable type checking.
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-17 14:43:54 +00:00
aurel32
8bb6e981e0 target-alpha: convert palcode ops to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5360 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-30 06:45:44 +00:00
aurel32
f18cd2238d target-alpha: convert FP ops to TCG
- Convert FP ops to TCG
- Fix S format
- Implement F and G formats (untested)
- Fix MF_FPCR an MT_FPCR
- Fix FTOIS, FTOIT, ITOFF, ITOFS, ITOFT
- Fix CPYSN, CPYSE

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5354 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-29 17:21:28 +00:00
aurel32
04acd30726 target-alpha: convert remaining arith3 functions to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5254 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-18 13:45:14 +00:00
aurel32
6ad025921c target-alpha: switch a few helpers to TCG
Switch a few helpers to TCG and implement RC and RS instructions

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5247 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-18 00:02:17 +00:00
aurel32
b3249f630e target-alpha: convert byte manipulation instructions to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5246 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-17 22:04:52 +00:00
aurel32
ae8ecd4231 target-alpha: convert arith2 instructions to TCG
Replace gen_arith2 generic macro and dyngon ops by instruction specific
optimized TCG code.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5235 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-16 22:44:02 +00:00
aurel32
fdbbb5d9f2 alpha: fix helper.h
the content of target-alpha/helper.h is duplicated twice

(Tristan Gingold)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5212 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-14 16:09:56 +00:00
aurel32
59df7f62a9 alpha: add target-alpha/helper.h (missing from commit r5150)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5161 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-04 20:24:14 +00:00