Commit Graph

115699 Commits

Author SHA1 Message Date
Rowan Hart
f2505260b3 plugins: add option to dump write argument to syscall plugin
Signed-off-by: Rowan Hart <rowanbhart@gmail.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Tested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20240827215329.248434-3-rowanbhart@gmail.com>
[AJB: tweak fmt string for vaddr]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240916085400.1046925-18-alex.bennee@linaro.org>
2024-09-19 15:58:01 +01:00
Rowan Hart
595cd9ce2e plugins: add plugin API to read guest memory
Signed-off-by: Rowan Hart <rowanbhart@gmail.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20240827215329.248434-2-rowanbhart@gmail.com>
[AJB: tweaked cpu_memory_rw_debug call]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240916085400.1046925-17-alex.bennee@linaro.org>
2024-09-19 15:58:01 +01:00
Akihiko Odaki
0d279bec0f contrib/plugins: Add a plugin to generate basic block vectors
SimPoint is a widely used tool to find the ideal microarchitecture
simulation points so Valgrind[2] and Pin[3] support generating basic
block vectors for use with them. Let's add a corresponding plugin to
QEMU too.

Note that this plugin has a different goal with tests/plugin/bb.c.

This plugin creates a vector for each constant interval instead of
counting the execution of basic blocks for the entire run and able to
describe the change of execution behavior. Its output is also
syntactically simple and better suited for parsing, while the output of
tests/plugin/bb.c is more human-readable.

[1] https://cseweb.ucsd.edu/~calder/simpoint/
[2] https://valgrind.org/docs/manual/bbv-manual.html
[3] https://www.intel.com/content/www/us/en/developer/articles/tool/pin-a-dynamic-binary-instrumentation-tool.html

Signed-off-by: Yotaro Nada <yotaro.nada@gmail.com>
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20240816-bb-v3-1-b9aa4a5c75c5@daynix.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240916085400.1046925-16-alex.bennee@linaro.org>
2024-09-19 15:58:01 +01:00
Alex Bennée
bc02be4508 util/timer: avoid deadlock when shutting down
When we shut down a guest we disable the timers. However this can
cause deadlock if the guest has queued some async work that is trying
to advance system time and spins forever trying to wind time forward.
Pay attention to the return code and bail early if we can't wind time
forward.

Reported-by: Elisha Hollander <just4now666666@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20240916085400.1046925-15-alex.bennee@linaro.org>
2024-09-19 15:58:01 +01:00
Alex Bennée
ecbcc9ead2 tests/tcg: add a system test to check memory instrumentation
At first I thought I could compile the user-mode test for system mode
however we already have a fairly comprehensive test case for system
mode in "memory" so lets use that.

As tracking every access will quickly build up with "print-access" we
add a new mode to track groups of reads and writes to regions. Because
the test_data is 16k aligned we can be sure all accesses to it are
ones we can count.

First we extend the test to report where the test_data region is. Then
we expand the pdot() function to track the total number of reads and
writes to the region. We have to add some addition pdot() calls to
take into account multiple reads/writes in the test loops.

Finally we add a python script to integrate the data from the plugin
and the output of the test and validate they both agree on the total
counts. As some boot codes clear the bss we also add a flag to add a
regions worth of writes to the expected total.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20240916085400.1046925-14-alex.bennee@linaro.org>
2024-09-19 15:58:01 +01:00
Alex Bennée
3b2899e3dd tests/tcg: ensure s390x-softmmu output redirected
The multiarch system tests output serial data which should be
redirected to the "output" chardev rather than echoed to the console.

Comment the use of EXTFLAGS variable while we are at it.

Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240916085400.1046925-13-alex.bennee@linaro.org>
2024-09-19 15:58:01 +01:00
Alex Bennée
aa5584b579 tests/tcg: only read/write 64 bit words on 64 bit systems
While the compilers will generally happily synthesise a 64 bit value
for you on 32 bit systems it doesn't exercise anything on QEMU. It
also makes it hard to accurately compare the accesses to test_data
when instrumenting.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240916085400.1046925-12-alex.bennee@linaro.org>
2024-09-19 15:58:01 +01:00
Alex Bennée
34f29c6c5b tests/tcg: clean up output of memory system test
This is useful information when debugging memory issues so lets
improve by:

  - include the ptr address for u8 fills (like the others)
  - indicate the number of operations for reads and writes
  - explicitly note when we are flushing
  - move the fill printf to after the reset

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240916085400.1046925-11-alex.bennee@linaro.org>
2024-09-19 15:58:01 +01:00
Pierrick Bouvier
354b5c19b3 tests/tcg/multiarch: add test for plugin memory access
Add an explicit test to check expected memory values are read/written.
8,16,32 load/store are tested for all arch.
64,128 load/store are tested for aarch64/x64.
atomic operations (8,16,32,64) are tested for x64 only.

By default, atomic accesses are non atomic if a single cpu is running,
so we force creation of a second one by creating a new thread first.

load/store helpers code path can't be triggered easily in user mode (no
softmmu), so we can't test it here.

Output of test-plugin-mem-access.c is the list of expected patterns in
plugin output. By reading stdout, we can compare to plugins output and
have a multiarch test.

Can be run with:
make -C build/tests/tcg/$ARCH-linux-user run-plugin-test-plugin-mem-access-with-libmem.so

Tested-by: Xingtao Yao <yaoxt.fnst@fujitsu.com>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240910172033.1427812-7-pierrick.bouvier@linaro.org>
Message-Id: <20240916085400.1046925-10-alex.bennee@linaro.org>
2024-09-19 15:58:01 +01:00
Pierrick Bouvier
7fd9ff76cc tests/tcg/plugins/mem: add option to print memory accesses
By using "print-accesses=true" option, mem plugin will now print every
value accessed, with associated size, type (store vs load), symbol,
instruction address and phys/virt address accessed.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Xingtao Yao <yaoxt.fnst@fujitsu.com>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20240724194708.1843704-6-pierrick.bouvier@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240916085400.1046925-9-alex.bennee@linaro.org>
2024-09-19 15:58:01 +01:00
Pierrick Bouvier
8856bd2653 tests/tcg: allow to check output of plugins
A specific plugin test can now read and check a plugin output, to ensure
it contains expected values.

Tested-by: Xingtao Yao <yaoxt.fnst@fujitsu.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20240724194708.1843704-5-pierrick.bouvier@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240916085400.1046925-8-alex.bennee@linaro.org>
2024-09-19 15:58:01 +01:00
Pierrick Bouvier
7cefff22d5 tests/tcg: add mechanism to run specific tests with plugins
Only multiarch tests are run with plugins, and we want to be able to run
per-arch test with plugins too.

Tested-by: Xingtao Yao <yaoxt.fnst@fujitsu.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20240724194708.1843704-4-pierrick.bouvier@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240916085400.1046925-7-alex.bennee@linaro.org>
2024-09-19 15:58:01 +01:00
Pierrick Bouvier
9505f85e2d plugins: extend API to get latest memory value accessed
This value can be accessed only during a memory callback, using
new qemu_plugin_mem_get_value function.

Returned value can be extended when QEMU will support accesses wider
than 128 bits.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1719
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2152
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Xingtao Yao <yaoxt.fnst@fujitsu.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20240724194708.1843704-3-pierrick.bouvier@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240916085400.1046925-6-alex.bennee@linaro.org>
2024-09-19 15:58:01 +01:00
Pierrick Bouvier
b709da5d29 plugins: save value during memory accesses
Different code paths handle memory accesses:
- tcg generated code
- load/store helpers
- atomic helpers

This value is saved in cpu->neg.plugin_mem_value_{high,low}. Values are
written only for accessed word size (upper bits are not set).

Atomic operations are doing read/write at the same time, so we generate
two memory callbacks instead of one, to allow plugins to access distinct
values.

For now, we can have access only up to 128 bits, thus split this in two
64 bits words. When QEMU will support wider operations, we'll be able to
reconsider this.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20240724194708.1843704-2-pierrick.bouvier@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240916085400.1046925-5-alex.bennee@linaro.org>
2024-09-19 15:58:01 +01:00
Alex Bennée
f63c987b05 contrib/plugins: control flow plugin
This is a simple control flow tracking plugin that uses the latest
inline and conditional operations to detect and track control flow
changes. It is currently an exercise at seeing how useful the changes
are.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240916085400.1046925-4-alex.bennee@linaro.org>
2024-09-19 15:58:01 +01:00
Alex Bennée
7866b0f721 deprecation: don't enable TCG plugins by default with TCI
The softmmu memory instrumentation test sees so many more accesses
than a normal translated host and its really not worth fixing up. Lets
deprecate this odd configuration and save on the CI cycles.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240916085400.1046925-3-alex.bennee@linaro.org>
2024-09-19 15:58:01 +01:00
Alex Bennée
cf2a78cbbb deprecation: don't enable TCG plugins by default on 32 bit hosts
The existing plugins already liberally use host pointer stuffing for
passing user data which will fail when doing 64 bit guests on 32 bit
hosts. We should discourage this by officially deprecating support and
adding another nail to the 32 bit host coffin.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240916085400.1046925-2-alex.bennee@linaro.org>
2024-09-19 15:58:01 +01:00
Peter Maydell
14556211bc DMA fix for macio IDE device
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Merge tag 'qemu-macppc-20240918' of https://github.com/mcayland/qemu into staging

DMA fix for macio IDE device

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# gpg: Signature made Wed 18 Sep 2024 10:43:38 BST
# gpg:                using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F
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* tag 'qemu-macppc-20240918' of https://github.com/mcayland/qemu:
  mac_dbdma: Remove leftover `dma_memory_unmap` calls

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-09-18 20:59:10 +01:00
Peter Maydell
5eff4231ce Migration pull request for 9.2
- Fabiano's patch to move two tests to slow tests.
 - Peter's patch to fix qatzip builds
 - Stefan's multifd-zstd fix on unsigned diff comparisons
 - Fea's bug fix to consistently use memattrs when map() address space
 - Fabiano's bug fix on multifd race condition against receivedmap
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Merge tag 'migration-20240917-pull-request' of https://gitlab.com/peterx/qemu into staging

Migration pull request for 9.2

- Fabiano's patch to move two tests to slow tests.
- Peter's patch to fix qatzip builds
- Stefan's multifd-zstd fix on unsigned diff comparisons
- Fea's bug fix to consistently use memattrs when map() address space
- Fabiano's bug fix on multifd race condition against receivedmap

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# gpg: Signature made Wed 18 Sep 2024 19:31:17 BST
# gpg:                using EDDSA key B9184DC20CC457DACF7DD1A93B5FCCCDF3ABD706
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* tag 'migration-20240917-pull-request' of https://gitlab.com/peterx/qemu:
  migration/multifd: Fix rb->receivedmap cleanup race
  migration/savevm: Remove extra load cleanup calls
  softmmu/physmem.c: Keep transaction attribute in address_space_map()
  migration/multifd: Fix loop conditions in multifd_zstd_send_prepare and multifd_zstd_recv
  migration/multifd: Fix build for qatzip
  tests/qtest/migration: Move a couple of slow tests under g_test_slow

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-09-18 20:58:57 +01:00
Peter Maydell
55ccaed2d1 tests/fp: Make mul and div tests have a longer timeout
At the moment we run all fp-test tests except for the muladd ones
with the default meson test timeout of 30s. This is plenty for
most of the test cases, but for multiplication and division we
can sometimes hit the timeout if the CI runner is going slow.

Add support to meson.build for a way to override the timeout on
a per test basis, and use it to set the timeout to 60s for
fp-test-rem, fp-test-div and fp-test-mul. We can use this new
generic mechanism also to set the timeout for mulAdd rather
than hardcoding it.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240917141641.2836265-1-peter.maydell@linaro.org
2024-09-18 20:58:43 +01:00
Fabiano Rosas
4ce5622908 migration/multifd: Fix rb->receivedmap cleanup race
Fix a segmentation fault in multifd when rb->receivedmap is cleared
too early.

After commit 5ef7e26bdb ("migration/multifd: solve zero page causing
multiple page faults"), multifd started using the rb->receivedmap
bitmap, which belongs to ram.c and is initialized and *freed* from the
ram SaveVMHandlers.

Multifd threads are live until migration_incoming_state_destroy(),
which is called after qemu_loadvm_state_cleanup(), leading to a crash
when accessing rb->receivedmap.

process_incoming_migration_co()        ...
  qemu_loadvm_state()                  multifd_nocomp_recv()
    qemu_loadvm_state_cleanup()          ramblock_recv_bitmap_set_offset()
      rb->receivedmap = NULL               set_bit_atomic(..., rb->receivedmap)
  ...
  migration_incoming_state_destroy()
    multifd_recv_cleanup()
      multifd_recv_terminate_threads(NULL)

Move the loadvm cleanup into migration_incoming_state_destroy(), after
multifd_recv_cleanup() to ensure multifd threads have already exited
when rb->receivedmap is cleared.

Adjust the postcopy listen thread comment to indicate that we still
want to skip the cpu synchronization.

CC: qemu-stable@nongnu.org
Fixes: 5ef7e26bdb ("migration/multifd: solve zero page causing multiple page faults")
Signed-off-by: Fabiano Rosas <farosas@suse.de>
Link: https://lore.kernel.org/r/20240917185802.15619-3-farosas@suse.de
[peterx: added comment in migration_incoming_state_destroy()]
Signed-off-by: Peter Xu <peterx@redhat.com>
2024-09-18 14:27:39 -04:00
Fabiano Rosas
90a384d461 migration/savevm: Remove extra load cleanup calls
There are two qemu_loadvm_state_cleanup() calls that were introduced
when qemu_loadvm_state_setup() was still called before loading the
configuration section, so there was state to be cleaned up if the
header checks failed.

However, commit 9e14b84908 ("migration/savevm: load_header before
load_setup") has moved that configuration section part to
qemu_loadvm_state_header() which now happens before
qemu_loadvm_state_setup().

Remove the cleanup calls that are now misplaced.

Note that we didn't use Fixes because it's benign to cleanup() even if
setup() is not invoked.  So this patch is not needed for stable, as it
falls into cleanup category.

Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
Link: https://lore.kernel.org/r/20240917185802.15619-2-farosas@suse.de
[peterx: added last paragraph of commit message]
Signed-off-by: Peter Xu <peterx@redhat.com>
2024-09-18 14:27:39 -04:00
Fea.Wang
d8d5ca4004 softmmu/physmem.c: Keep transaction attribute in address_space_map()
The follow-up transactions may use the data in the attribution, so keep
the value of attribution from the function parameter just as
flatview_translate() above.

Signed-off-by: Fea.Wang <fea.wang@sifive.com>
Cc: qemu-stable@nongnu.org
Fixes: f26404fbee ("Make address_space_map() take a MemTxAttrs argument")
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Link: https://lore.kernel.org/r/20240912070404.2993976-2-fea.wang@sifive.com
Signed-off-by: Peter Xu <peterx@redhat.com>
2024-09-18 14:27:39 -04:00
Stefan Weil
cb0ed522a5 migration/multifd: Fix loop conditions in multifd_zstd_send_prepare and multifd_zstd_recv
GitHub's CodeQL reports four critical errors which are fixed by this commit:

    Unsigned difference expression compared to zero

An expression (u - v > 0) with unsigned values u, v is only false if u == v,
so all changed expressions did not work as expected.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Link: https://lore.kernel.org/r/20240910054138.1458555-1-sw@weilnetz.de
[peterx: Fix mangled email for author]
Signed-off-by: Peter Xu <peterx@redhat.com>
2024-09-18 14:27:24 -04:00
Mattias Nissler
2d0a071e62 mac_dbdma: Remove leftover dma_memory_unmap calls
These were passing a NULL buffer pointer unconditionally, which happens
to behave in a mostly benign way (except for the chance of an excess
memory region unref and a bounce buffer leak). Per the function comment,
this was never meant to be accepted though, and triggers an assertion
with the "softmmu: Support concurrent bounce buffers" change.

Given that the code in question never sets up any mappings, just remove
the unnecessary dma_memory_unmap calls along with the DBDMA_io struct
fields that are now entirely unused.

Signed-off-by: Mattias Nissler <mnissler@rivosinc.com>
Message-Id: <20240916175708.1829059-1-mnissler@rivosinc.com>
Fixes: be1e343995 ("macio: switch over to new byte-aligned DMA helpers")
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-09-18 09:31:56 +01:00
Peter Xu
561ce01493 migration/multifd: Fix build for qatzip
The qatzip series was based on an older commit, it applied cleanly even
though it has conflicts.  Neither CI nor myself found the build will break
as it's skipped by default when qatzip library was missing.

Fix the build issues.  No need to copy stable as it just landed 9.2.

Cc: Yichen Wang <yichen.wang@bytedance.com>
Cc: Bryan Zhang <bryan.zhang@bytedance.com>
Cc: Hao Xiang <hao.xiang@linux.dev>
Cc: Yuan Liu <yuan1.liu@intel.com>
Fixes: 80484f9459 ("migration: Introduce 'qatzip' compression method")
Link: https://lore.kernel.org/r/20240910210450.3835123-1-peterx@redhat.com
Signed-off-by: Peter Xu <peterx@redhat.com>
2024-09-17 17:50:45 -04:00
Fabiano Rosas
6abc8f1266 tests/qtest/migration: Move a couple of slow tests under g_test_slow
The xbzrel and vcpu_dirty_limit are the two slowest tests from
migration-test. Move them under g_test_slow() to save about 40s per
run.

Signed-off-by: Fabiano Rosas <farosas@suse.de>
Link: https://lore.kernel.org/r/20240911145204.17692-1-farosas@suse.de
Signed-off-by: Peter Xu <peterx@redhat.com>
2024-09-17 17:50:45 -04:00
Peter Maydell
2b81c04625 Pull request
An integer overflow fix for the last zone on a zoned block device whose
 capacity is not a multiple of the zone size.
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Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into staging

Pull request

An integer overflow fix for the last zone on a zoned block device whose
capacity is not a multiple of the zone size.

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# gpg: Signature made Tue 17 Sep 2024 12:43:07 BST
# gpg:                using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [full]
# gpg:                 aka "Stefan Hajnoczi <stefanha@gmail.com>" [full]
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35  775A 9CA4 ABB3 81AB 73C8

* tag 'block-pull-request' of https://gitlab.com/stefanha/qemu:
  hw/block: fix uint32 overflow

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-09-17 14:02:18 +01:00
Peter Maydell
9b47188186 * Make all qtest targets work with "--without-default-devices"
* Replace assert(0) and assert(false) in qtests and s390x code
 * Enable the device aliases for or1k
 * Some other small test improvements
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Merge tag 'pull-request-2024-09-17' of https://gitlab.com/thuth/qemu into staging

* Make all qtest targets work with "--without-default-devices"
* Replace assert(0) and assert(false) in qtests and s390x code
* Enable the device aliases for or1k
* Some other small test improvements

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# gpg: Signature made Tue 17 Sep 2024 11:33:48 BST
# gpg:                using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg:                issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg:                 aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg:                 aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg:                 aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3  EAB9 2ED9 D774 FE70 2DB5

* tag 'pull-request-2024-09-17' of https://gitlab.com/thuth/qemu:
  .gitlab-ci.d/crossbuilds.yml: Force 'make check' to -j2 for cross-i686-tci
  tests/functional: Move the mips64el fuloong2e test into the thorough category
  docs/fuzz: fix outdated mention to enable-sanitizers
  system: Enable the device aliases for or1k, too
  system: Sort QEMU_ARCH_VIRTIO_PCI definition
  tests/qtest: remove break after g_assert_not_reached()
  tests/qtest: replace assert(false) with g_assert_not_reached()
  include/hw/s390x: replace assert(false) with g_assert_not_reached()
  tests/unit: replace assert(0) with g_assert_not_reached()
  tests/qtest: replace assert(0) with g_assert_not_reached()
  gitlab: fix logic for changing docker tag on stable branches
  .gitlab-ci.d/buildtest: Build most targets in the build-without-defaults job
  tests/qtest: Disable numa-test if the default machine is not available
  tests/qtest/meson.build: Add more CONFIG switches checks for the x86 tests
  tests/qtest/hd-geo-test: Check for availability of "pc" machine before using it
  tests/qtest/boot-order-test: Make the machine name mandatory in this test
  tests/qtest/cdrom-test: Improve the machine detection in the cdrom test

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-09-17 14:02:02 +01:00
Peter Maydell
da7de6ef57 vfio queue:
* Support for IGDs of gen 11 and later
 * Coverity fixes
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Merge tag 'pull-vfio-20240917' of https://github.com/legoater/qemu into staging

vfio queue:

* Support for IGDs of gen 11 and later
* Coverity fixes

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# gpg: Signature made Tue 17 Sep 2024 11:30:53 BST
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* tag 'pull-vfio-20240917' of https://github.com/legoater/qemu:
  vfio/igd: correctly calculate stolen memory size for gen 9 and later
  vfio/igd: don't set stolen memory size to zero
  vfio/igd: add ID's for ElkhartLake and TigerLake
  vfio/igd: add new bar0 quirk to emulate BDSM mirror
  vfio/igd: use new BDSM register location and size for gen 11 and later
  vfio/igd: support legacy mode for all known generations
  vfio/igd: return an invalid generation for unknown devices
  hw/vfio/pci.c: Use correct type in trace_vfio_msix_early_setup()

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-09-17 14:01:51 +01:00
Peter Maydell
cff199398f edk2: update to 2024-08 stable tag.
acpi: update test data (address changed due to firmware size change).
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Merge tag 'edk2-stable202408-20240917-pull-request' of https://gitlab.com/kraxel/qemu into staging

edk2: update to 2024-08 stable tag.
acpi: update test data (address changed due to firmware size change).

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# gpg: Signature made Tue 17 Sep 2024 09:36:25 BST
# gpg:                using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* tag 'edk2-stable202408-20240917-pull-request' of https://gitlab.com/kraxel/qemu:
  tests/acpi: disallow acpi test data updates
  tests/acpi: update aarch64/virt/SSDT.memhp
  add loongarch binaries for edk2-stable202408
  roms: Support compile the efi bios for loongarch
  update binaries to edk2-stable202408
  update submodule and version file to edk2-stable202408
  tests/acpi: allow acpi test data updates

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-09-17 11:40:07 +01:00
Peter Maydell
6fe7fc96e7 aspeed queue:
* I2C support for AST2700
 * Coverity fixes
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Merge tag 'pull-aspeed-20240916' of https://github.com/legoater/qemu into staging

aspeed queue:

* I2C support for AST2700
* Coverity fixes

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# NDncQEsWgya+Ykv9lXgulDxZrc8qsSmj4aoRNtJHaGsxmb4RwSY=
# =NyK5
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 16 Sep 2024 19:55:45 BST
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* tag 'pull-aspeed-20240916' of https://github.com/legoater/qemu:
  machine_aspeed.py: Update to test I2C for AST2700
  aspeed: Add tmp105 in i2c bus 0 for AST2700
  aspeed/soc: Support I2C for AST2700
  aspeed/soc: Introduce a new API to get the device irq
  hw/i2c/aspeed: Add support for 64 bit addresses
  hw/i2c/aspeed: Add support for Tx/Rx buffer 64 bit addresses
  hw/i2c/aspeed: Add AST2700 support
  hw/i2c/aspeed: Introduce a new dma_dram_offset attribute in AspeedI2Cbus
  hw/i2c/aspeed: Support discontinuous poll buffer memory region of I2C bus
  hw/i2c/aspeed: Introduce a new bus pool buffer attribute in AspeedI2Cbus
  hw/i2c/aspeed: Support discontinuous register memory region of I2C bus
  hw/gpio/aspeed_gpio: Avoid shift into sign bit

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-09-17 11:39:58 +01:00
Peter Maydell
a765aa6501 .gitlab-ci.d/crossbuilds.yml: Force 'make check' to -j2 for cross-i686-tci
In commit 1374ed49e1 we forced the cross-i686-tci job to -j1 to
see if this helped with test timeouts. It seems to help with that but
on the other hand we now sometimes run into the overall 60 minute
job timeout. Try -j2 instead.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-id: 20240916134913.2540486-1-peter.maydell@linaro.org
2024-09-17 11:39:50 +01:00
Dmitry Frolov
89cd6254b8 hw/block: fix uint32 overflow
The product bs->bl.zone_size * (bs->bl.nr_zones - 1) may overflow
uint32.

Found by Linux Verification Center (linuxtesting.org) with SVACE.

Signed-off-by: Dmitry Frolov <frolov@swemel.ru>
Message-id: 20240917080356.270576-2-frolov@swemel.ru
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2024-09-17 12:12:30 +02:00
Peter Maydell
66659fe76d .gitlab-ci.d/crossbuilds.yml: Force 'make check' to -j2 for cross-i686-tci
In commit 1374ed49e1 we forced the cross-i686-tci job to -j1 to
see if this helped with test timeouts. It seems to help with that but
on the other hand we now sometimes run into the overall 60 minute
job timeout. Try -j2 instead.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20240916134913.2540486-1-peter.maydell@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-09-17 10:53:13 +02:00
Thomas Huth
0d2a8acf3f tests/functional: Move the mips64el fuloong2e test into the thorough category
Commit d2fce37597 added a test that downloads an asset from the
internet, so this test should not be run by default anymore and be
put into the thorough category instead.

Message-ID: <20240913175140.3329083-1-thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-09-17 10:52:44 +02:00
Matheus Tavares Bernardino
c0f86125c3 docs/fuzz: fix outdated mention to enable-sanitizers
This options has been removed at cb771ac1f5 (meson: Split
--enable-sanitizers to --enable-{asan, ubsan}, 2024-08-13), so let's
update its last standing mention in the docs.

Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Reviewed-by: Brian Cain <bcain@quicinc.com>
Message-ID: <0ecf4e1ab26771009d74a2ce61e7c17ddc586ef7.1726226316.git.quic_mathbern@quicinc.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-09-17 10:52:20 +02:00
Thomas Huth
eef0a1e3f2 system: Enable the device aliases for or1k, too
Now that we've got a "virt" machine for or1k that supports PCI
too (commit 40fef82c4e "hw/openrisc: Add PCI bus support to virt")
we can also enable the virtio device aliases like we do on other
similar platforms. This will e.g. help to run the iotests with
qemu-system-or1k later.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20240705090808.1305765-1-thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20240705124528.97471-3-philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-09-17 10:50:39 +02:00
Philippe Mathieu-Daudé
a1b47343fe system: Sort QEMU_ARCH_VIRTIO_PCI definition
Sort the QEMU_ARCH_VIRTIO_PCI to simplify adding/removing entries.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20240705124528.97471-2-philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-09-17 10:50:39 +02:00
Pierrick Bouvier
70dc9c8ab5 tests/qtest: remove break after g_assert_not_reached()
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20240912073921.453203-36-pierrick.bouvier@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-09-17 10:50:39 +02:00
Pierrick Bouvier
317e39f446 tests/qtest: replace assert(false) with g_assert_not_reached()
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20240912073921.453203-24-pierrick.bouvier@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-09-17 10:50:39 +02:00
Pierrick Bouvier
446ef11261 include/hw/s390x: replace assert(false) with g_assert_not_reached()
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Eric Farman <farman@linux.ibm.com>
Message-ID: <20240912073921.453203-15-pierrick.bouvier@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-09-17 10:50:39 +02:00
Pierrick Bouvier
6ceefb931f tests/unit: replace assert(0) with g_assert_not_reached()
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20240912073921.453203-14-pierrick.bouvier@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-09-17 10:50:39 +02:00
Pierrick Bouvier
74dcb2535d tests/qtest: replace assert(0) with g_assert_not_reached()
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20240912073921.453203-13-pierrick.bouvier@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-09-17 10:50:39 +02:00
Daniel P. Berrangé
8d5ab746b1 gitlab: fix logic for changing docker tag on stable branches
This fixes:

  commit e28112d007
  Author: Daniel P. Berrangé <berrange@redhat.com>
  Date:   Thu Jun 8 17:40:16 2023 +0100

    gitlab: stable staging branches publish containers in a separate tag

Due to a copy+paste mistake, that commit included "QEMU_JOB_SKIPPED"
in the final rule that was meant to be a 'catch all' for staging
branches.

As a result stable branches are still splattering dockers from the
primary development branch.

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Tested-by: Michael Tokarev <mjt@tls.msk.ru>
Message-ID: <20240906140958.84755-1-berrange@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-09-17 10:50:39 +02:00
Thomas Huth
790761c432 .gitlab-ci.d/buildtest: Build most targets in the build-without-defaults job
Now that all the qtests are able to deal with builds that use the
"--without-default-devices" configuration switch, we can add all
targets to the build-without-defaults job. But to avoid burning too
much CI cycles in this job, exclude some targets where we already
have similar test coverage by a related target.

Message-ID: <20240905191434.694440-9-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-09-17 10:50:27 +02:00
Corvin Köhne
8719224166 vfio/igd: correctly calculate stolen memory size for gen 9 and later
We have to update the calculation of the stolen memory size because
we've seen devices using values of 0xf0 and above for the graphics mode
select field. The new calculation was taken from the linux kernel [1].

[1] 7c626ce4ba/arch/x86/kernel/early-quirks.c (L455-L460)

Signed-off-by: Corvin Köhne <c.koehne@beckhoff.com>
Reviewed-by: Alex Williamson <alex.williamson@redhat.com>
2024-09-17 10:37:55 +02:00
Corvin Köhne
971ca22f04 vfio/igd: don't set stolen memory size to zero
The stolen memory is required for the GOP (EFI) driver and the Windows
driver. While the GOP driver seems to work with any stolen memory size,
the Windows driver will crash if the size doesn't match the size
allocated by the host BIOS. For that reason, it doesn't make sense to
overwrite the stolen memory size. It's true that this wastes some VM
memory. In the worst case, the stolen memory can take up more than a GB.
However, that's uncommon. Additionally, it's likely that a bunch of RAM
is assigned to VMs making use of GPU passthrough.

Signed-off-by: Corvin Köhne <c.koehne@beckhoff.com>
Reviewed-by: Alex Williamson <alex.williamson@redhat.com>
2024-09-17 10:37:55 +02:00
Corvin Köhne
9c86b9fb43 vfio/igd: add ID's for ElkhartLake and TigerLake
ElkhartLake and TigerLake devices were tested in legacy mode with Linux
and Windows VMs. Both are working properly. It's likely that other Intel
GPUs of gen 11 and 12 like IceLake device are working too. However,
we're only adding known good devices for now.

Signed-off-by: Corvin Köhne <c.koehne@beckhoff.com>
Reviewed-by: Alex Williamson <alex.williamson@redhat.com>
2024-09-17 10:37:55 +02:00
Corvin Köhne
11b5ce95be vfio/igd: add new bar0 quirk to emulate BDSM mirror
The BDSM register is mirrored into MMIO space at least for gen 11 and
later devices. Unfortunately, the Windows driver reads the register
value from MMIO space instead of PCI config space for those devices [1].
Therefore, we either have to keep a 1:1 mapping for the host and guest
address or we have to emulate the MMIO register too. Using the igd in
legacy mode is already hard due to it's many constraints. Keeping a 1:1
mapping may not work in all cases and makes it even harder to use. An
MMIO emulation has to trap the whole MMIO page. This makes accesses to
this page slower compared to using second level address translation.
Nevertheless, it doesn't have any constraints and I haven't noticed any
performance degradation yet making it a better solution.

[1] 5c351bee0f/devicemodel/hw/pci/passthrough.c (L650-L653)

Signed-off-by: Corvin Köhne <c.koehne@beckhoff.com>
Reviewed-by: Alex Williamson <alex.williamson@redhat.com>
2024-09-17 10:37:55 +02:00